AMD XILINX VEK280 User Manual page 42

3/20/24, 12:51 PM
The detailed device connections for the feature described in this section are
documented in the VEK280 board XDC file, referenced in
PMC MIO[44:45] I2C1 Bus
[Figure 1, callout 12]
Bus I2C1 connects the XCVE2802 U1 PS bank 501 and the XCZU4EG system
controller U125 PS bank 501.
The detailed device connections for the feature described in this section are
documented in the VEK280 evaluation board XDC file, referenced in
Constraints.
Figure: I2C1 Bus Topology
U34 is an I2C addressable 128-Kbit serial I2C bus EEPROM. It has two addresses
associated with it. Address 0x54 is used when the memory array is accessed. When
using 0x5C, the identification page is accessed.
PMC MIO[46:47] I2C0 Bus
[Figure 1, callout 12]
Bus I2C0 connects the XCVP1802 U1 PS bank 501 and the XCZU4EG system
controller U125 PS bank 501 to a GPIO 16-bit port expander (TCA6416A U233) and
I2C switch (TCA9548A U33). The port expander enables accepting various SFP,
FMCP connector, and power system status inputs and outputs. Bus I2C0 also
provides access to power system PMBus power controllers and INA226 power
monitors, as well as RC21008A clock components via the U33 TCA9548A switch.
TCA6416A U233 is pin-strapped to respond to I2C address 0x20. The TCA9548A
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