Usb_Boot Interface - Quectel LTE-A Series Hardware Design

t(cl) SPI clock low level time
t(mov) SPI master data output valid time
t(mis) SPI master data input setup time
t(mih) SPI master data input hold time
The voltage range of the SPI interface is 1.8 V. Therefore, A level translator between module and host
should be used if the application is equipped with a 3.3 V processor or device interface.
Below is a reference design of SPI Interface with a Level Translator.
VDD_EXT
0.1 μF
SPI_CS
SPI_CLK
SPI_MOSI
SPI_MISO
Figure 29: Reference Design of SPI Interface with Level Translator

3.21. USB_BOOT Interface

EG060V-EA provides a USB_BOOT interface. Developers can pull up USB_BOOT to VDD_EXT before
powering on the module, thus the module will enter into emergency download mode when powered on. In
this mode, the module supports firmware upgrade over USB interface.
Table 26: Pin Definition of USB_BOOT Interface
Pin Name Pin No.
USB_BOOT 140
EG060V-EA_Hardware_Design
VCCA
OE
A1
Translator
A2
A3
A4
NC
I/O Description
Force the module into emergency
DI
download mode
EG060V-EA Hardware Design
9.0 -
-5.0 -
5.0 -
1.0 -
VCCB
0.1 μF
GND
B1
B2
B3
B4
NC
Comment
1.8 V power domain.
Active high.
If unused, keep it open.
LTE-A Module Series
- ns
5.0 ns
- ns
- ns
VDD_MCU
SPI_CS_N_MCU
SPI_CLK_MCU
SPI_MOSI_MCU
SPI_MISO_MCU
55 / 82