HPE ProLiant MicroServer Gen10 Plus v2 User Manual page 15

Item Item Description Description
1 PCI Express version
2 Physical connector link width
3 Negotiable link width
Riser board slots Riser board slots
Definition Definition
Each PCIe version corresponds to a specific data transfer rate between
the processor and peripheral devices. Generally, a version update
corresponds to an increase in transfer rate.
PCIe 1.x
PCIe 2.x
PCIe 3.x
PCIe 4.x
The PCIe technology is under constant development. For the latest
information, see the PCI-SIG website PCI-SIG website.
PCIe devices communicate through a logical connection called an
interconnect or link. At the physical level, a link is composed of one or
more lanes. The number of lanes is written with an x prefix with x16
being the largest size in common use.
x1
x2
x4
x8
x16
These numbers correspond to the maximum link bandwidth supported by
the slot.
HPE ProLiant MicroServer Gen10 Plus v2 User Guide 15