Analog Devices ADF7021-V Manual page 13

UART/SPI Mode
UART mode is enabled by setting Register 0, Bit DB28 to 1. SPI mode is enabled by setting Register 0, Bit DB28 to 1 and setting Register 15,
Bits[DB19:DB17] to 0x7. The transmit/receive data clock is available on the CLKOUT pin.
(TRANSMIT/RECEIVE DATA
CLOCK IN SPI MODE.
NOT USED IN UART MODE.)
(TRANSMIT DATA INPUT
IN UART/SPI MODE.)
TxRxDATA
(RECEIVE DATA OUTPUT
IN UART/SPI MODE.)
Tx/Rx MODE
(TRANSMIT/RECEIVE DATA
CLOCK IN SPI MODE.
NOT USED IN UART MODE.)
(TRANSMIT DATA INPUT
IN UART/SPI MODE.)
TxRxDATA
(RECEIVE DATA OUTPUT
IN UART/SPI MODE.)
Tx/Rx MODE
CLKOUT
FETCH SAMPLE
TxRxCLK
Tx BIT
Tx BIT
Figure 8. Transmit Timing Diagram in UART/SPI Mode
CLKOUT
FETCH SAMPLE
TxRxCLK
Rx BIT
Rx BIT
Figure 9. Receive Timing Diagram in UART/SPI Mode
t
BIT
Tx BIT Tx BIT
HIGH-Z
Tx MODE
t
BIT
HIGH-Z
Rx BIT Rx BIT
Rx MODE
Rev. 0 | Page 13 of 60
ADF7021-V
Tx BIT
Rx BIT