Analog Devices ADF7021-V Manual page 12

ADF7021-V
4FSK Timing
In 4FSK receive mode, MSB/LSB synchronization should be guaranteed by detection of the SWD pin in the receive bit stream.
SLE
TxRxCLK
TxRxDATA
Tx/Rx MODE
SLE
TxRxCLK
TxRxDATA
Tx/Rx MODE
t
SYMBOL
t
BIT
Rx SYMBOL Rx SYMBOL
Rx SYMBOL
MSB LSB
Figure 6. Receive-to-Transmit Timing Diagram in 4FSK Mode
Tx SYMBOL
Tx SYMBOL Tx SYMBOL
MSB LSB
Figure 7. Transmit-to-Receive Timing Diagram in 4FSK Mode
REGISTER 0 WRITE
SWITCH FROM Rx TO Tx
t
11
Rx SYMBOL Tx SYMBOL
LSB MSB
MSB
Rx MODE
REGISTER 0 WRITE
SWITCH FROM Tx TO Rx
t
15
t
14
Tx SYMBOL
MSB LSB
Tx MODE
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t
13
t
12
Tx SYMBOL Tx SYMBOL
LSB MSB
Tx MODE
t
SYMBOL
t
BIT
Rx SYMBOL Rx SYMBOL
MSB LSB
Rx MODE