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A
J9
+3.3Vcc
+3.3Vcc
R49
R50
SDCLK0
SDCKE
DQM
SBTS#
SDWE#
CAS#
4
RAS#
SDA10
+3.3Vcc
R48
10K
U18
+3.3Vcc
200
VDD32
192
VDD31
191
VDD30
182
VDD29
176
VDD28
172
VDD27
163
VDD26
158
3
VDD25
156
VDD24
141
VDD23
140
VDD22
131
VDD21
130
VDD20
124
VDD19
120
VDD18
110
VDD17
105
VDD16
95
VDD15
93
VDD14
85
VDD13
77
VDD12
67
VDD11
66
VDD10
61
VDD9
54
VDD8
45
VDD7
36
VDD6
32
VDD5
29
VDD4
21
VDD3
20
VDD2
9
2
VDD1
1
VDD0
A[0..23]
1
A
B
+3.3Vcc
R51
R52
R53
ADSP-21065L
+3.3Vcc
R54
16
D[0..31]
10K
www.BDTIC.com/ADI
B
C
JP6
+3.3Vcc
+3.3Vcc
1-2
Host Boot
2-3
EPROM Boot
R57
R64
Initially JP6 = 2-3
JP6
SJP6
1
2
3
Jumper3
Shunt
MS0#
MS1#
MS2#
MS3#
1
MS0#
RD#
2
MS1#
3
MS2#
SW#
4
MS3#
ACK
5
RD#
6
WR#
BR1#
7
SW#
BR2#
8
9
BR1#
10
BR2#
11
ID0
12
ID1
HBR#
13
HBR#
HBG#
14
CS#
CS#
15
REDY#
REDY#
C
D
+3.3Vcc
J10
14
13
TDO
GND
12
11
TDI
BTDI
10
9
TRST
BTRST
8
7
TCK
BTCK
6
5
TMS
BTMS
When not used jumper pins
4
3
CLKIN
Key
2
1
EMU
GND
EZ-ICE
+3.3Vcc
204
GND36
196
GND35
187
GND34
186
C118
C119
GND33
181
GND32
177
GND31
168
GND30
167
GND29
159
GND28
155
GND27
154
GND26
150
GND25
139
GND24
135
GND23
129
GND22
125
GND21
119
GND20
114
C121
C122
C123
C124
GND19
106
GND18
99
GND17
94
GND16
89
GND15
81
GND14
73
GND13
72
GND12
68
GND11
62
GND10
60
GND9
57
GND8
49
GND7
41
GND6
35
GND5
33
GND4
25
GND3
14
GND2
10
GND1
3
GND0
JP7
JP8
1-2
1-2
Single Processor
1-2
2-3
Processor 1
DSP_CLK
2-3
1-2
Processor 2
2-3
2-3
INVALID
TP1
Initially both should be
installed
WR#
JP8
SJP10
3
Ana log Devices, Inc.
2
One Tech nology Way.
1
Norwood, MA 02062
Shunt
JP7
SJP11
Title
ADSP-21065L EZ- LAB
3
Proc. Main
2
Size
Documen t Number
1
B
65-000299- 02 (1125-01-001-0201)
Shunt
Date
Wed nesday, November 18, 1998
Drawn By
Kris Stafford
Filename
{Filename}
D
E
R72
SJP7
SJP8
Shunt
Shunt
4
7 - 8
9 - 10
C120
+
3
+3.3Vcc
C125
C126
C127
+
2
1
Designed by Paragon Innovations, Inc .
email: info@paragon-t x.com
Rev
2.0
Approved
Sheet
7
of
8
E
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