Table 3-5 Memory Map - Analog Devices ADSP-21065L EZ-KIT Lite Manual

On reset, restart, and halt, the debug monitor kernal forces IMDW0 to 1 and IMDW1 to 0
but user code should also set these bits to ensure that it operates in the same way on both
the simulator and the EZ-KIT Lite board. These settings only affect data accesses, not
instruction fetches.
•
Block 0 resides in Three Column memory. If you are storing data in Block 0, it
must be in three column format.
•
The user may not use DAG2 (PM data bus) to access SDRAM because SDRAM
is mapped into an address that is greater than 24 bits. For example, the C
segment seg_pmda should not be mapped to SDRAM.
•
If the user is using C interrupt handlers in his/her program, (i.e. interrupt()) then
seg_dmda must not be located in external SDRAM. In this case seg_dmda
MUST be located in internal memory. This is caused by a problem with the
interrupt handlers in libc.dlb. A correction will be posted to the Analog Devices
FTP site.
Start Address
0x0000 0000
0x0000 8000
0x0000 C000
0x0001 0000
0x0001 8000
0x0002 0000
0x0100 0000
0x0100 0001
0x0100 0004
0x0300 0000
1. Use caution when accessing the Boot EPROM. The EPROM chip select, BMS, has the same limitations as
MS0. EPROMs larger than 128K x 8 have restricted access to their data below address 0x020000 and their data
is aliased to other memory locations. The user program can access this data from these other locations.
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Memory Map
Table 3-5
End Address Content
0x0000 02FF Registers
0x0000 9FFF Block 0 Normal Address
(internal memory)
0x0000 DFFF Block 1 Normal Address
(internal memory)
0x0001 3FFF Block 0 Short word
0x0001 BFFF Block 1 Short word
EPROM (through BMS)
0x0002 FFFF
0x0100 0000 EMAFE Address (reserved for
the EZ-KIT)
0x0100 0001 EMAFE Data (reserved for
the EZ-KIT)
0x0100 0007 UART (reserved for the EZ-
KIT)
0x0310 0000 SDRAM (reserved for the EZ-
KIT)
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