Table of Contents
Advertisement
A
+3.3Vcc
C9
+
C10
C11
C12
C13
C14
4
+5VA
C37
3
Pin 1 is the center pin
FB1
0.01uF
J1
1
VIN_1
4
3
C1
3
1
2
2
VIN_2
DC Jack
PLM250S40
2
Z2
Z3
Rubber Foot
Rubber Foot
Z4
Z5
1
Rubber Foot
Rubber Foot
A
B
+5Vcc
C20
+
C21
C22
C23
C24
Vin
D8
R73
C2
R75
0.025 Ohm
S2A
C5
+
U1
4
Vin
8
EN
R74
C15
0.05 Ohm
U2
4
Vin
8
EN
www.BDTIC.com/ADI
B
C
+3.3Vcc
FB4
C25
Ferrite Bead
C38
+3.3Vcc
C8 is used to minimize
noise on the board
C8
where 5Vcc crosses the
+3.3Vcc plane.
+5Vcc
Heat sink
9
HQ1
3.3V, 1.0A
573300
Q1
+3.3Vcc
NDB6020P
C3
C6
+
5
Vout
2
nc0
6
nc1
ADP3310-3.3
Heat sink
HQ2
5.0V, 0.5A
573300
Locate Ferrite Bead across
voltage split in plane
Q2
+5VA
+5Vcc
FB3
NDB6020P
Ferrite Bead
C16
C18
C19
+
5
Vout
2
nc0
6
nc1
ADP3310-5.0
C
D
+3.3Vcc
14
U21A
Y1
R1
8
5
1
VCC
OUT
39 Ohm
1
4
7
NC
GND
74LCX14
C39
30.0000MHz
U21B
3
74LCX14
U21C
5
74LCX14
U21D
U21E
U21F
8
11
10
13
74LCX14
74LCX14
74LCX14
+3.3Vcc
C4
+3.3Vcc
U3
2
SW1
Vcc
1
3
1
MR
2
4
4
PFI
PUSHB UTTON1
3
GND
ADM708T
C17
+
Ana log Devices, Inc.
One Tech nology Way.
Norwood, MA 02062
Title
ADSP-21065L EZ- LAB
PWR/RST
Size
Documen t Number
B
65-000299- 02 (1125-01-001-0201)
Date
Th ursday, November 19, 1998
Drawn By
Kris Stafford
Filename
{Filename}
D
E
R2
2
DSP_CLK
39 Ohm
4
R3
4
PLD_CLK
39 Ohm
R4
EXT_CLK
6
39 Ohm
12
3
8
RST
RESET
7
RESET#
RESET
5
PFO
6
nc
2
1
Designed by Paragon Innovations, Inc .
email: info@paragon -tx.com
Rev
2.0
Approved
Sheet
1
of
8
E
Advertisement
Table of Contents
