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9 – Maintenance
9.1.2 Sub-sea Electronics Pod
The SEP includes three circuit boards:
❐
Main Board
❐
Driver Board
❐
Analogue Board
9.1.2.1 Main Board
(See drawings 401178 and B929935 in
The main board assembly (401183) comprises the main board (401178) with an
integral piggy-back board (B929934). The spares part is 401183 which incorpo-
rates the integral piggy-back board.
The SEP drives the coil channels sequentially with control exercised through a Programmable Timer
under the direction of a high-performance Digital Signal Processor (DSP) on the Main Board.
After amplification, the signals from each channel pass to the analogue-to-digital converter (ADC) and
then to the DSP. The DSP performs the complex signal analysis necessary to determine the target
position.
Finally, the Main Board sends the target co-ordinates to the SDC through an optically isolated serial
communications link.
9.1.2.2 Driver Board
(See drawing 401181 in Section
Under the control of the Main Board, the Driver Board drives the coil channels using four power
MOSFET switches.
A current limiter allows coil current to rise to a maximum value of 20A during each drive pulse. The
action of the limiter ensures that the amplitude of the current pulse is substantially independent of any
variations in the supply voltage arriving at the PSU.
At the correct moment during each measurement cycle, the Driver Board switches off coil drive current.
At this moment, the current in the coil falls very rapidly towards zero causing a back e.m.f. that drives
the associated MOSFET briefly into avalanche breakdown at 250V.
Refer to Appendix A for details of the operating theory and the timing for each measurement cycle.
An LC filter smoothes the current drawn from the PSU to an approximately continuous level (not RMS)
of 7A (with three search-coils attached).
9.1.2.3 Analogue Board
(See drawing 401071 in Section
9-4
Chapter 10 "System
NOTE
Chapter 10 "System
Drawings")
Chapter 10 "System
Drawings")
© Teledyne TSS
Drawings")
DPN 402196 Issue 4.1
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