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1.1 Features
Minimum instruction execution time can be changed from high speed (0.125
speed system clock) to low-speed (2.0
General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
ROM, RAM capacities
Part Number
Item
µ
PD78F0101H
µ
PD78F0102H
µ
PD78F0103H
Note The internal flash memory and internal high-speed RAM capacities can be changed using the internal
memory size switching register (IMS).
On-chip single-power-supply flash memory
Self-programming (with boot swap function)
On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)
Short startup is possible via the CPU default start using the on-chip Ring-OSC
On-chip clock monitor function using on-chip Ring-OSC
On-chip watchdog timer (operable with Ring-OSC clock)
I/O ports: 22
Timer: 5 channels
Serial interface:
2 channels
UART (LIN (Local Interconnect Network)-bus supported): 1 channel
Note 1
CSI1/UART
:
1 channel (
10-bit resolution
A/D converter: 4 channels
Supply voltage:
V
Operating ambient temperature: T
Notes 1.
Select either of the functions of these alternate-function pins.
2.
Use the product in a voltage range of 2.2 to 5.5 V because the detection voltage (V
power-on-clear (POC) circuit is 2.1 V ±0.1 V.
Caution The operating voltage range may be changed after evaluation of the device.
CHAPTER 1 OUTLINE
µ
s: @ 16 MHz operation with high-speed system clock)
Program Memory
(ROM)
Flash memory
8 KB
16 KB
24 KB
µ
PD78F0101H only, CSI1: 1 channel)
= 2.7 to 5.5 V (with Ring-OSC clock: V
DD
= −40 to +85°C
A
Preliminary User's Manual U16846EJ1V0UD
Note
512 bytes
Note
768 bytes
Note
= 2.0 to 5.5 V
DD
µ
s: @ 16 MHz operation with high-
Data Memory
(Internal High-Speed RAM)
Note 2
)
POC
) of the
15
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