Figure 9.15 Connection Example With 32-Bit Paged Rom (Synchronous Burst Access Memc); Figure 9.16 Connection Example With 16-Bit Paged Rom (Synchronous Burst Access Memc) - Renesas R-IN32M4-CL3 User Manual

R-IN32M4-CL3 User's Manual: Board design edition
9.2.2.2 Connection Example with Paged ROM
The following figure shows an example when this LSI chip is connected to paged ROM.
R-IN32M4-CL3

Figure 9.15 Connection Example with 32-Bit Paged ROM (Synchronous Burst Access MEMC)

R-IN32M4-CL3

Figure 9.16 Connection Example with 16-Bit Paged ROM (Synchronous Burst Access MEMC)

Caution: The on-page mode of paged ROM can only be used when CSZ0 is connected.
Note: When the address/data multiplexing feature is enabled (the ADMUXMODE pin is at the high
level), separate connection of the address bus is not required.
R18UZ0074EJ0100
Dec 24, 2019
BUSCLK
Note
A2-A21
D16-D31
CSZ0
RDZ
WRSTBZ
D0-D15
BUSCLK
Note
A1-A20
D0-D15
CSZ0
RDZ
WRSTBZ
9. External MCU/Memory Interface Pins
BUSCLK
Note
A0-A19
O0-O15
Paged ROM
(1 Mword × 16 bits)
/CE
/OE
/WE
BUSCLK
Note
A0-A19
O0-O15
Paged ROM
(1 Mword × 16 bits)
/CE
/OE
/WE
BUSCLK
Note
A0-A19
Paged ROM
O0-O15
(1 Mword × 16 bits)
/CE
/OE
/WE
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