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R-IN32M4-CL3 User's Manual: Board design edition
2.3

Reset Pins

This is a list of reset pins of R-IN32M4-CL3.
As a width at low level of at least 1 s is required for the reset input signals, secure this by applying the low level of the
reset signal over the oscillation stabilization time of the external oscillator (25 MHz).
In addition, de-assert the RESETZ and HOTRESETZ signals after de-asserting the PONRZ signal.
Pin Name
Function
PONRZ
Power-on reset input (including built-in RAM initialization)
RESETZ
Reset input
HOTRESETZ
Hot reset input (reset pin for bypass mode of CC-Link IE field)
TRSTZ
JTAG reset signal
RSTOUTZ
External reset output
R18UZ0074EJ0100
Dec 24, 2019
2. Power/Reset Pins
Reference for Connection Example
See Section 15, JTAG/Trace Pins.
Page 6 of 61

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