Gigabit Ethernet Phy Pins; Power Supply Peripheral Circuit; Circuit Configuration; Figure 6.1 Configuration Of Gigabit Ethernet Phy Power Supply Peripheral Circuit - Renesas R-IN32M4-CL3 User Manual

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R-IN32M4-CL3 User's Manual: Board design edition
6.

Gigabit Ethernet PHY Pins

Since the Gigabit Ethernet PHY interface handles high-speed transfer, designing the board pattern for it and other
components requires full consideration on numerous points.
Design it in accord with the advice in this section.
6.1

Power Supply Peripheral Circuit

6.1.1

Circuit Configuration

3.3 V
power plane
47 µF 10 µF
For the number
of pins
0.1 µF

Figure 6.1 Configuration of Gigabit Ethernet PHY Power Supply Peripheral Circuit

R18UZ0074EJ0100
Dec 24, 2019
R-IN32M4-CL3 power
R-IN power
PLL_VDD
VDD33
GbE-PHY power
VDD25A
VDD33
VDD25A
VDD25A
VDD11A
VDD11A
2.5-V built-in regulator power
VDDREG_33
AVDDREG_33
For the peripheral circuit configuration,
refer to Section 7 "2.5-V built-in Regulator
Peripheral Circuit Configuration".
◎ Decoupling capacitors (bypass capacitors)
Placing one within 0.5 inches of each power supply
pin is preferable.
Give priority to the placement of bypass capacitors
for GbE-PHY power pins. When placing bypass
capacitors for all of the R-IN power supply pins is
difficult, arrange one for every two or three pins.
See Section 4, PLL
Power Supply Pins.
VDD11
10 µF
Ferrite
bead
10 µF
VDD11
Ferrite
bead
10 µF
Place these
capacitors as close
to the respective
power source pins
as is possible.
6. Gigabit Ethernet PHY Pins
1.15 V
power plane
2.5 V
power plane
Page 13 of 61

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