R-IN32M4-CL3 User's Manual: Board design edition
9.2.1.1
Connection Example with SRAM
The following figure shows an example when this LSI chip is connected to SRAM.
R-IN32M4-CL3
Figure 9.9 Connection Example with 32-Bit SRAM (Asynchronous SRAM MEMC)
R-IN32M4-CL3
Figure 9.10 Connection Example with 16-Bit SRAM (Asynchronous SRAM MEMC)
Remark: n = 0–3
R18UZ0074EJ0100
Dec 24, 2019
A2-A19
D16-D31
CSZn
RDZ
(WRZ2) / BENZ2
(WRZ3) / BENZ3
WRSTBZ
D0-D15
(WRZ0) / BENZ0
(WRZ1) / BENZ1
A1-A18
D0-D15
CSZn
RDZ
(WRZ1) / BENZ1
(WRZ0) / BENZ0
WRSTBZ
9. External MCU/Memory Interface Pins
A0-A17
I/O1-I/O16
/CS
SRAM
/OE
(256 Kwords × 16 bits)
/LB
/UB
/WE
A0-A17
I/O1-I/O16
/CS
SRAM
/OE
(256 Kwords × 16 bits)
/LB
/UB
/WE
A0-A17
I/O1-I/O16
/CS
SRAM
/OE
(256 Kwords × 16 bits)
/UB
/LB
/WE
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