Renesas R-IN32M4-CL2 User Manual
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Renesas R-IN32M4-CL2 User Manual

Renesas R-IN32M4-CL2 User Manual

Board design edition
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R-IN32M4-CL2
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
Document number: R18UZ0046EJ0200
Issue date: Dec. 28, 2018
Renesas Electronics
www.renesas.com
User's Manual: Board design edition

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Summary of Contents for Renesas R-IN32M4-CL2

  • Page 1 All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
  • Page 2 Electronics product for any application for which it is not intended. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics.
  • Page 3 Instructions for the use of product In this section, the precautions are described for over whole of CMOS device. Please refer to this manual about individual precaution. When there is a mention unlike the text of this manual, a mention of the text takes first priority. Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual.
  • Page 4 The document related to R-IN32M4-CL2 Document Name Document Number R-IN32M4-CL2 User’s Manual R18UZ0032EJ**** R-IN32M4-CL2 User’s Manual: Peripheral Modules R18UZ0034EJ**** R-IN32M4-CL2 User’s Manual: Gigabit Ethernet PHY R18UZ0044EJ**** R-IN32M4-CL2 Programming Manual: Driver R18UZ0036EJ**** R-IN32M4-CL2 Programming Manual: OS R18UZ0040EJ**** R-IN32M4-CL2 User’s Manual: Board design edition...
  • Page 5 2. Notation of Numbers and Symbols Weight in data notation: Left is high-order column, right is low-order column Active low notation: xxxZ (capital letter Z after pin name or signal name) or xxx_N (capital letter _N after pin name or signal name) or xxnx (pin name or signal name contains small letter n) Note: Explanation of (Note) in the text...

  • Page 6: Table Of Contents

    Contents Overview ................................ 1 Definition of Pin Handling and Symbols in This Manual ................... 1 Power/Reset Pins ............................2 Power-On/Off Sequence ............................. 2 Power Supply Pins .............................. 4 Reset Pins ................................5 Clock Input Pins ............................. 6 Pin Functions ..............................6 Notes on Configuring the Oscillation Circuit .....................
  • Page 7 Thermal Design <R> ........................... 22 Deciding on whether Particular Measures for Heat Dissipation are Required ..........22 7.1.1 Estimating Tj ............................22 7.1.2 Estimating Power Consumption ......................22 Thermal Resistances under the JEDEC Conditions (for θja and Ψjt) ............23 7.1.3 7.1.4 Results of Estimating Power Consumption of the 1-V Sub-Systems at Tj ..........
  • Page 8 16. A/D Converter Pins ............................55 17. JTAG/Trace Pins ............................56 18. Implementation Conditions .......................... 60 19. Package Information ............................ 61 20. Mount Pad Information ..........................62 21. BSCAN Information ............................. 63 21.1 BSCAN Operating Conditions .......................... 63 21.2 Maximum Operating Frequency of TCK ......................63 21.3 IDCODE ................................

  • Page 9: Overview

    This manual is intended for being used by engineers that work on a circuit and PCB design that is equipped with an Ethernet communication LSI from the R-IN32M4-CL2 made by Renesas Electronics. The target device is the R-IN32M4-CL2. It is recommended to study this manual carefully and to follow the recommendations during the circuit and board design.

  • Page 10: Power/Reset Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 2. Power/Reset Pins Power/Reset Pins Power-On/Off Sequence Table 2.1 lists the external power supply to the R-IN32M4 and GbE-PHY. In addition, Figure 2.1 shows the power on/off sequence. (GbE stands for Gigabit Ethernet.) Though there is no specific order for supplying the power-supply voltages, we recommend supplying the VDD33 external power after supplying the VDD10 external power.
  • Page 11 R-IN32M4-CL2 User’s Manual: Board design edition 2. Power/Reset Pins (1) Power on Supply power in a way that satisfies both conditions below. 1. The time from whichever is first to do so among VDD33, VDD25, and VDD10 reaches 10% VDD until all power supplies exceed 90% VDD is within 100 ms.

  • Page 12: Power Supply Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 2. Power/Reset Pins Power Supply Pins This is a list of power supply pins of R-IN32M4-CL2. When designing with these pins, refer to the connection example as follows. Pin Name Function Reference for Connection Example PLL_VDD PLL power supply (1.0 V)

  • Page 13: Reset Pins

    2. Power/Reset Pins Reset Pins This is a list of reset pins of R-IN32M4-CL2. As a width at low level of at least 1 µs is required for the reset input signals, secure this by applying the low level of the reset signal over the oscillation stabilization time of the external oscillator (25 MHz).

  • Page 14: Clock Input Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 3. Clock Input Pins Clock Input Pins Pin Functions This is a list of pin functions of clock input pins. Pin Name Attribute Function Input Connects an external oscillator. In external clock input mode (OSCTH = 1), drive XT1 to the low level.

  • Page 15: Notes On Configuring The Oscillation Circuit

    ・Make the ground connections of the capacitors to the GND pins of R-IN32M4-CL2 as short and thick as possible. ・Make the lead wires between the resonator and capacitors as short as possible.
  • Page 16 ・The range of oscillating operation may vary due to the dielectric constant of the board’s material, so use the actual printed circuit board that will be used in the finished design. ・Check use of the board with the developed R-IN32M4-CL2 and the actual resonator to be mounted on it. R18UZ0046EJ0200 Page 8 of 68 Dec.

  • Page 17: Configuration Example Of Oscillation Circuits

    Figure 3.2 Configuration Example of the Oscillation Circuit Caution: The input of the R-IN32M4-CL2 is fixed to 25 MHz. When a resonator is to be used, contact the resonator manufacturer and ask for a corresponding part number and external constants.

  • Page 18: Pll Power Supply Pins

    　　 Reference ferrite beads: TDK MPZ2012S601A, MPZ1608S601A 　　　　 Figure 4.1 Recommended Configuration of Filter Caution: Place C1 immediately close to R-IN32M4-CL2. If C2 is not placed immediately close to R-IN32M4-CL2, this will not cause any problems. R18UZ0046EJ0200 Page 10 of 68 Dec. 28, 2018...

  • Page 19: Notes On Placement Of Peripheral Components

    4. PLL Power Supply Pins Notes on Placement of Peripheral Components The 0.1-µF ceramic capacitor (C1) should be placed immediately close to R-IN32M4-CL2 (in the immediate vicinity of the pin). Figure 4.2 is a schematic view from below the board.

  • Page 20: Gpio Port Pins

    5. GPIO Port Pins GPIO Port Pins GPIO is a general-purpose I/O port. As for the internal configuration, see the section in the following document. Section 7, Port Functions in the R-IN32M4-CL2 User’s Manual R18UZ0046EJ0200 Page 12 of 68 Dec. 28, 2018...

  • Page 21: Gigabit Ethernet Phy Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 6. Gigabit Ethernet PHY Pins Gigabit Ethernet PHY Pins Since the Gigabit Ethernet PHY interface handles high-speed transfer, designing the board pattern for it and other components requires full consideration on numerous points. Design it in accord with the advice in this section.

  • Page 22: Recommended Components

    R-IN32M4-CL2 User’s Manual: Board design edition 6. Gigabit Ethernet PHY Pins 6.1.2 Recommended Components (1) Ceramic capacitors We recommend using components that satisfy the following conditions. Capacitors: 47 µF, 10 µF, and 0.1 µF Thermal characteristic: X5R or X7R ESR: No more than 0.1Ω (from 100 kHz to 100 MHz) Table 6.1 Example of Recommended Components of Ceramic Capacitors...

  • Page 23: Peripheral Circuit Of Pulse Transformer

    R-IN32M4-CL2 User’s Manual: Board design edition 6. Gigabit Ethernet PHY Pins Peripheral Circuit of Pulse Transformer An example of the circuit configuration for the Gigabit Ethernet PHY, pulse transformers, and RJ-45 connector, and recommended pulse transformer products are shown below.

  • Page 24: Recommended Components

    We recommend using pulse transformer that satisfy the following conditions. We also recommend the constitution illustrated in Transformer of Fig6.3. Common-mode chokes are not required on the R-IN32M4-CL2 (PHY side) and is mounted on the connector. Winding ratio: 1:1 (±2% or less, or ±3%) recommended Return loss (see Figure 6.4): -18dB or less (1.0 MHz to 40 MHz)

  • Page 25: Ref_Rext And Ref_Filt Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 6. Gigabit Ethernet PHY Pins REF_REXT and REF_FILT Pins The method of handling the REF_REXT and REF_FILT pins and recommended values for the connected components are shown below. 6.3.1 Example of Circuit Configuration Place the wiring separately from that for other high-frequency signals, but place the components close to the pins.

  • Page 26: Phyadd Pin Handling

    R-IN32M4-CL2 User’s Manual: Board design edition 6. Gigabit Ethernet PHY Pins PHYADD Pin Handling To change the PHY address, handle the pins as follows. Leave the PHY address pins at 0000 (floating) unless otherwise specified. 6.4.1 Example of Pin Handling ◎PHYADD[4:1] = 1111...

  • Page 27: Notes On Board Wiring

    • Bends in lines should be at angles of at least 135 degrees. (Figure 6.7) • Differential signal traces between the R-IN32M4-CL2, pulse transformer, and RJ-45 connector should be designed with a differential impedance of 100Ω ± 10% and with an impedance of 50Ω relating to GND.
  • Page 28 R-IN32M4-CL2 User’s Manual: Board design edition 6. Gigabit Ethernet PHY Pins Figure 6.7 Example of Wiring for Differential Signals (2) Figure 6.8 Example of Wiring for Differential Signals (3) R18UZ0046EJ0200 Page 20 of 68 Dec. 28, 2018...
  • Page 29 R-IN32M4-CL2 User’s Manual: Board design edition 6. Gigabit Ethernet PHY Pins void void Figure 6.9 Example of Wiring for Differential Signals (4) R18UZ0046EJ0200 Page 21 of 68 Dec. 28, 2018...

  • Page 30: Thermal Design

    7.1.1 Estimating Tj Take Tj ≤ 121.7°C as the criterion for Tj of the R-IN32M4-CL2. Estimate Tj from the following formulae. Tj = Tt + Ψjt x power or Tj = Ta + θja x power : Junction temperature [°C] : Package surface temperature [°C]...

  • Page 31: Thermal Resistances Under The Jedec Conditions (For Θja And Ψjt)

    R-IN32M4-CL2 User’s Manual: Board design edition 7. Thermal Design <R> Thermal Resistances under the JEDEC Conditions (for θja and Ψjt) 7.1.3 The thermal resistances under the JEDEC-2S2P conditions are as follows. However, these values are for the devices alone; care is required since the actual thermal resistances will depend on the board, casing, and peripheral components.

  • Page 32: Results Of Estimating Power Consumption Of The 1-V Sub-Systems At Tj

    R-IN32M4-CL2 User’s Manual: Board design edition 7. Thermal Design <R> 7.1.4 Results of Estimating Power Consumption of the 1-V Sub-Systems at Tj The results of calculating power consumption by the 1-V sub-systems (maximum values) vary with the effects of θja and Ta on Tj.

  • Page 33: Relation Between Temperature Increases (∆T) And Thermal Resistance (Θja) At A Given Ambient

    7.1.5 Given Ambient Temperature The thermal resistance (θja) of the R-IN32M4-CL2 depends on the board, casing, and peripheral components. If respective criteria for the temperature rise (Δt = T ) apply to the end product, refer to the graph below that shows the required θja to reach the target Δt.

  • Page 34: Examples Of Measures For Heat Dissipation

    R-IN32M4-CL2 User’s Manual: Board design edition 7. Thermal Design <R> Examples of Measures for Heat Dissipation We classify measures for heat dissipation into two types. For details, see the following pages. (1) Measures for heat release in designing the board •...

  • Page 35: Measures For Heat Release In Designing The Board

    R-IN32M4-CL2 User’s Manual: Board design edition 7. Thermal Design <R> 7.2.1 Measures for Heat Release in Designing the Board (1) Thermal Vias Placing as many vias to the power supply and GND areas as possible below the center of the package increases the number of paths for the flow of heat in the z direction.
  • Page 36 R-IN32M4-CL2 User’s Manual: Board design edition 7. Thermal Design <R> (4) Appropriate Placement of Components Placing heat-generating components close to this device affects its heat efficiency, so do not place heat-generating components in its vicinity. Caution. For example, placing a regulator with high power consumption in the vicinity of this device has the effect of significantly reducing its heat dissipation.

  • Page 37: Heat Dissipation From The Periphery (Including The Casing)

    R-IN32M4-CL2 User’s Manual: Board design edition 7. Thermal Design <R> 7.2.2 Heat Dissipation from the Periphery (Including the Casing) (1) Incorporating a Heat Sink Incorporating a heat sink increases the area for heat dissipation, making heat dissipation from the surface of the device more efficient.

  • Page 38: Caution

    R-IN32M4-CL2 User’s Manual: Board design edition 7. Thermal Design <R> Caution <R> 7.3.1 Handling of Unused Pins If an unused pin is clamped to the GND or a power supply on the board, the corresponding pin must have the input attribute as a fixed setting.

  • Page 39: Cc-Link Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 8. CC-Link Pins CC-Link Pins A connection example for CC-Link remote device station is shown in Figure 8.1, Connection Example for CC-Link Remote Device Station. For notes on the implementation of the CC-Link, refer to CC-Link Specifications: Implementation Specification (BAP- 05027) issued by the CC-Link Partner Association.
  • Page 40 R-IN32M4-CL2 User’s Manual: Board design edition 8. CC-Link Pins R-IN32M4-CL2 SN75ALS181SN 35605-5153-B00 PE MC177050-A401 CCS_RD(P54) CCS_WDTZ(P12) RDENL（Pxx） Note CCS_MON7(P05) CCS_SDGATEON(P51) 3300pF CCS_MON6(P04) CCS_MON5(P03) CCS_SD(P56) CCS_MON4(P55) CCS_MON3(P12 or P67) CCS_MON2(P01 or P11) CCS_MON1(P00 or P10) CCS_MON0(P06) HZU6.2ZTRF-E CCS_RESOUT(P07) CCS_FUSEZ(P42) CCS_STATION_NO_7(P77) CCS_STATION_NO_6(P76)

  • Page 41: Cc-Link Ie Field Pins

    TRACEDATA2 pin (multiplexed with CCI_WAITEDGEH) and the TRACEDATA3 pin (multiplexed with CCI_WRLENH) high during a reset. If the TRACEDATA2 and TRACEDATA3 pins are driven low during a reset, accessing the CC-Link IE field from the CPU in the R-IN32M4-CL2 is not possible. R18UZ0046EJ0200 Page 33 of 68...

  • Page 42: External Mcu/Memory Interface Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins External MCU/Memory Interface Pins This LSI is able to connect an external MCU or memory. The connection mode is decided by the signal level of the MEMIFSEL, MEMCSEL, HIFSYNC, and ADMUXMODE pins as shown in Table 10.1...

  • Page 43: External Mcu Interface

    R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.1 External MCU Interface The external MCU interface is multiplexed with the external memory interface. When the MEMIFSEL pin is set to the high level, it functions as the external MCU interface.

  • Page 44: Asynchronous-Sram Supporting Mcu Connection Mode

    R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.1.1 Asynchronous-SRAM Supporting MCU Connection Mode The following figure shows a general connection example in asynchronous-SRAM supporting MCU interface mode, when this LSI chip is connected as a slave device to an external MCU.
  • Page 45 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins HWRZ0-HWRZ3 and HBENZ0-HBENZ3 are multiplexed on the same pins, and the pin functions are Notes 1. selected by the level on the HWRZSEL pin. Connecting the HERROUTZ signal is not indispensable.

  • Page 46: Synchronous-Sram Supporting Mcu Connection Mode

    R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.1.2 Synchronous-SRAM Supporting MCU Connection Mode The following figure shows a general connection example in synchronous-SRAM supporting MCU interface mode, when this LSI chip is connected as a slave device to an external MCU.
  • Page 47 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins Notes 1. HWRZ0-HWRZ3 and HBENZ0-HBENZ3 are multiplexed on the same pins, and the pin functions are selected by the level on the HWRZSEL pin. 2. Connecting the HERROUTZ signal is not indispensable.

  • Page 48: Synchronous-Burst-Transfer Supporting Mcu Connection Mode

    R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.1.3 Synchronous-Burst-Transfer Supporting MCU Connection Mode The following figure shows a general connection example in synchronous-burst-transfer supporting MCU connection mode, when this LSI chip is connected as a slave device to an external MCU.
  • Page 49 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins Notes 1. In this mode, drive the HWRZSEL pin low. 2. Connecting the HERROUTZ signal is not indispensable. Connect it to an interrupt or general-purpose port input of the MCU to be connected, if required.
  • Page 50 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.1.3.2 Address/Data Separated Mode (ADMUXMODE = L) R-IN32M4-CL2 External MCU HBUSCLK BUSCLK Note3 Note4 HA1-HA19 A2-A20 HD0-HD31 D0-D31 HCSZ PGCSZ HPGCSZ BCYSTZ / ADV HBCYSTZ HRDZ HWRSTBZ WRSTBZ HWRZ0 / HBENZ0...
  • Page 51 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins Notes 1. In this mode, drive the HWRZSEL pin low. 2. Connecting the HERROUTZ signal is not indispensable. Connect it to an interrupt or general-purpose port input of the MCU to be connected, if required.

  • Page 52: External Memory Interface

    R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.2 External Memory Interface This section describes the connection as a master device to an external memory. The operating connection mode of the external memory interface depends on the level of the signal on the MEMCSEL pin (see Table 10.1, Mode Selection of External MCU/Memory Connection).
  • Page 53 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.2.1.1 Connection Example with SRAM The following figure shows an example when this LSI chip is connected to SRAM. R-IN32M4-CL2 A2-A19 A0-A17 D16-D31 I/O1-I/O16 CSZn SRAM (256 Kwords × 16 bits)
  • Page 54 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.2.1.2 Connection Example with Paged ROM The following figure shows an example when this LSI chip is connected to paged ROM. R-IN32M4-CL2 A2-A21 A0-A19 D16-D31 O0-O15 Paged ROM CSZ0 (1 Mword ×...

  • Page 55: Synchronous Burst Access Memc

    R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.2.2 Synchronous Burst Access MEMC The synchronous burst access MEMC is externally connectable to paged ROM, ROM, SRAM, PSRAM, NOR-flash memory, or peripheral devices with an interface similar to the SRAM interface via a 16- or 32-bit bus.
  • Page 56 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.2.2.1 Connection Example with SRAM The following figure shows an example when this LSI chip is connected to SRAM. R-IN32M4-CL2 BUSCLK BUSCLK Note Note A2-A19 A0-A17 D16-D31 I/O1-I/O16 SRAM CSZn (256 Kwords ×...
  • Page 57 R-IN32M4-CL2 User’s Manual: Board design edition 10. External MCU/Memory Interface Pins 10.2.2.2 Connection Example with Paged ROM The following figure shows an example when this LSI chip is connected to paged ROM. R-IN32M4-CL2 BUSCLK BUSCLK Note Note A2-A21 A0-A19 D16-D31...

  • Page 58: Serial Flash Rom Connection Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 11. Serial Flash ROM Connection Pins Serial Flash ROM Connection Pins This LSI chip has a memory controller to connect the serial flash ROM that supports the SPI compatible interface. R-IN32M4-CL2 SMCSZ (P17) /S (/CS)

  • Page 59: Asynchronous Serial Interface J Connection Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 12. Asynchronous Serial Interface J Connection Pins Asynchronous Serial Interface J Connection Pins The following figure shows a connection example between the R-IN32M4-CL2 and the asynchronous serial interface J (UARTJ) device. R-IN32M4-CL2 UART device...

  • Page 60: I 2 C Connection Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 13. I2C Connection Pins C Connection Pins Figure 13.1 Connection Example between R-IN32M4-CL2 and I2C Slave Device shows a connection example between the R-IN32M4-CL2 and the I C slave device. Since the serial clock line and serial data line are N-ch. open drain outputs, an external pull-up resistor is required.

  • Page 61: Can Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 14. CAN Pins CAN Pins The following figure shows a connection example between the R-IN32M4-CL2 and the CAN transceiver. The CAN transceiver is used to connect the CAN bus. CAN bus R-IN32M4-CL2 CAN transceiver...

  • Page 62: Csih Pins

    The following figure illustrates the connections between an R-IN32M4-CL2 as a master and two slaves. In this example, the R-IN32M4-CL2 supplies one chip select (CS) signal to each of the slaves. This signal is connected to the slave select input (SSI) of the slave.

  • Page 63: A/D Converter Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 16. A/D Converter Pins A/D Converter Pins The following figure shows a recommended connection example between the A/D converter power supply pins and analog input pins. R-IN32M4-CL2 ADTRG (RP02) Control these signals according to the usage.

  • Page 64: Jtag/Trace Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 17. JTAG/Trace Pins JTAG/Trace Pins The following figures show examples when this LSI chip is connected to the ICE (in-circuit emulator). They are examples when connected to the 20-pin half-pitch connecter or 20-pin full-pitch connecter of standard.
  • Page 65 R-IN32M4-CL2 User’s Manual: Board design edition 17. JTAG/Trace Pins VDD33 (3.3 V) Reset circuit About 4.7 kΩ to R-IN32M4-CL2 ICE connecter (20-pin half-pitch) 10 kΩ RESETZ nRESET HOTRESETZ Wired OR connection with open drain TRSTZ Not connected TRACECLK TRACECLK TRACEDATA0...
  • Page 66 R-IN32M4-CL2 User’s Manual: Board design edition 17. JTAG/Trace Pins VDD33 (3.3 V) Reset About 4.7 kΩ to circuit R-IN32M4-CL2 ICE connecter (20-pin half-pitch) 10 kΩ RESETZ nRESET HOTRESETZ Wired OR connection with open drain TRSTZ Not connected TCK (SWCLK) TCK (SWCLK)
  • Page 67 R-IN32M4-CL2 User’s Manual: Board design edition 17. JTAG/Trace Pins VDD33 (3.3 V) Reset About 4.7 kΩ to circuit R-IN32M4-CL2 ICE connecter (20-pin full-pitch) 10 kΩ RESETZ nSRST HOTRESETZ Wired OR connection with open drain TRSTZ nTRST JTAGSEL Figure 17.4 Connection Example of JTAG Interface (20-Pin Full-Pitch)

  • Page 68: Implementation Conditions

    R-IN32M4-CL2 User’s Manual: Board design edition 18. Implementation Conditions Implementation Conditions The following figures show implementation conditions of the R-IN32M4-CL2. Open the aluminum dry pack Storage period is Baking within 7 days* (125°C, 24 to 72h) *Storage conditions: 5 to 30°C temperature,...

  • Page 69: Package Information

    R-IN32M4-CL2 User’s Manual: Board design edition 19. Package Information Package Information The following figure shows the package information of R-IN32M4-CL2. Figure 19.1 Package Information R18UZ0046EJ0200 Page 61 of 68 Dec. 28, 2018...

  • Page 70: Mount Pad Information

    R-IN32M4-CL2 User’s Manual: Board design edition 20. Mount Pad Information Mount Pad Information The following figure shows the mount pad information of the R-IN32M4-CL2. 0.50 to 0.70 mm 1.00 mm 0.43 to 0.53 mm 1.00 mm 0.43 to 0.53 mm Figure 20.1...

  • Page 71: Bscan Information

    R-IN32M4-CL2 User’s Manual: Board design edition 21. BSCAN Information BSCAN Information The R-IN32M4-CL2 provides the BSDL file. Caution: If the other device is connected to an input pin without the pin being pulled up or down, clamp the level on the board or set the logic in the other device.

  • Page 72: Bscan Non-Supported Pins

    R-IN32M4-CL2 User’s Manual: Board design edition 21. BSCAN Information 21.4 BSCAN Non-Supported Pins The following pins do not support BSCAN. Table 21.1 List of BSCAN Non-Supported Pins R-IN32M4-CL2 XT1, XT2, PONRZ, JTAGSEL, TMODE0-TMODE2, TMS, TDI, TDO, TRSTZ, TCK, TMC1, TMC2, TEST1, TEST3,...

  • Page 73: How To Get Bsdl

    R-IN32M4-CL2 User’s Manual: Board design edition 21. BSCAN Information 21.5 How to Get BSDL With regard to obtain the BSDL file, please contact a Renesas Sales Representative or Distributor in your area. R18UZ0046EJ0200 Page 65 of 68 Dec. 28, 2018...

  • Page 74: Ibis Information

    R-IN32M4-CL2 User’s Manual: Board design edition 22. IBIS Information IBIS Information For IBIS information, please contact a Renesas Sales Representative or Distributor in your area. R18UZ0046EJ0200 Page 66 of 68 Dec. 28, 2018...

  • Page 75: Marking Information

    R-IN32M4-CL2 User’s Manual: Board design edition 23. Marking Information Marking Information Product name: R9J03G019GBG Figure 23.1 R-IN32M4-CL2 Marking Information R18UZ0046EJ0200 Page 67 of 68 Dec. 28, 2018...

  • Page 76: Countermeasure For Noise

    24.1 Stopping Clock Output If the BUSCLK pin is not in use, output on the pin from the R-IN32M4-CL2 can be stopped. See section 2.2.2, Clock Control Registers (CLKGTD0, CLKGTD1) in the R-IN32M4-CL2 User’s Manual: Peripheral Modules regarding control of the GCBCLK bit in the CLKGTD1 register, which enables or disables output from the BUSCLK pin.
  • Page 77 Representation of pin handling in figures 10.7 and 10.8 modified 13. I C Connection Pins Reference to a connection example between the R-IN32M4-CL2 and the I slave device added. Representation of pin handling in figure 13.1 modified 15. A/D Converter Pins Representation of pin handling in figure 15.1 modified and notes added...
  • Page 78 R-IN32M4-CL2 User’s Manual: Board design edition REVISION HISTORY Rev. Date Description Page Summary 1.00 Feb. 28, 2017 16. JTAG/Trace Pins Representation of pin handling in figure 16.3 modified 16. JTAG/Trace Pins Representation of pin handling in figure 16.4 modified 2.00 Dec.
  • Page 79 R-IN32M4-CL2 User’s Manual: Board design edition REVISION HISTORY [MEMO]...
  • Page 80 R-IN32M4-CL2 User’s Manual: Board design edition Publication Date: Rev.0.01 Mar. 4, 2016 Rev.2.00 Dec. 28, 2018 Published by: Renesas Electronics Corporation...
  • Page 81 R-IN32M4-CL2 User’s Manual Board design edition R18UZ0046EJ0200...
  • Page 82 SALES OFFICES Refer to "http://www.renesas.com/" for the latest and detailed information. Renesas Electronics America Inc. 1001 Murphy Ranch Road, Milpitas, CA 95035, U.S.A. Tel: +1-408-432-8888, Fax: +1-408-434-5351 Renesas Electronics Canada Limited 9251 Yonge Street, Suite 8309 Richmond Hill, Ontario Canada L4C 9T3...

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