HP Visualize J2240 Service Handbook page 96

Ostat Code Name
FLT 4x2D LST_BYPASS_ERR
FLT 4x30 CACHE_BYTE_ERR
FLT 4x40 CACHE_FLUSH_ERR
FLT 4x50 ICACHE_MISS_ERR
FLT 4x60 DCACHE_MISS_ERR
FLT 4x81 DCACHE_D_ST_QUEUE_ERR
Extended info D000
Address in error[0:15]
Address in error[16:31]
Expected data[0:15]
Expected data[16:31]
Expected data[32:47]
Expected data[48:63]
Actual data[0:15]
Actual data[16:31]
Actual data[32:47]
Actual data[48:63]
x = Runway slot number
Ostat Code Name
FLT 5xy0 UNKNOWN_BUS_ERROR
FLT 5xy1 INTERNAL_ERROR
FLT 5xy2 PATH_ERROR_ASSERTED
FLT 5xy3 MODE_PHASE_ERROR
FLT 5xy4 PARITY_ERROR
FLT 5xy5 PROTOCOL_ERROR
FLT 5xy6 NO_SLAVE_ACK
FLT 5xy7 DIR_ERROR
FLT 5xy8 BROAD_ERROR
FLT 5xy9 IMPROPER_ACCESS_ERROR
FLT 5xyA ILLEGAL_RESPONSE
FLT 5xyB BUS_TIMEOUT
FLT 5xyD WATCHDOG_TIMEOUT
FLT 5xyE GBOA_TOC
FLT 5xyF TLB_FAULT
x = Master ID, y = bus number (will always be 0, which is Runway bus)
Master IDs are:
Table 4–9 LATE SELFTESTS (cont.)
Notes
Late cpu bypass register selftest failure
Cache byte selftest failure
Cache flush selftest failure
Icache miss selftest failure
Dcache miss selftest failure
Failure in data portion of dcache store queue
D=data
Addresses ending in 0 are even bank errors
Addresses ending in 8 are odd bank errors
Table 4–10. BUS TRANSACTIONS
Notes
Assertion of PATH_ERROR detected
Data Parity Error
Bus Protocol Error
Failure to Assert PATH_SLAVE_ACK
Runway directed error
Runway Broad Error
GeckoBoa TOC Error
U@ TLB fault or invalid PDIR entry
0 CPU0 4 IOA0
1 CPU1 5 IOA1
2 CPU2 6 IOA2
3 CPU3 7 IOA3
Troubleshooting 4–45