HP Visualize c100 Service Handbook page 110

Troubleshooting
Selftest Failures
2x30 ITAG
2x33 DCACHE_ALT_WRITE0
2x40 CACHE_IERR
detection selftest
2x44 DCACHE_ALT_READ0
2x50 DCACHE_STORE_QUEUE
selftest
2x51 DCACHE_STORE_QUEUE
selftest
FLT extended info D000/F000
F=tag
(even bank errors end in 0)
(odd bank errors end in 8)
2x55 DCACHE_ALT_WRITE1
2x60 DCACHE_ALINE
selftest
2x61 DCACHE_ALINE
selftest
FLT extended info same as 2x51
2x62 DCACHE_ALINE
selftest
FLT extended info D000/F000
open, F=tag open
(expected data is always 0)
Code Name
2x66 DCACHE_ALT_READ1
2x70 DCACHE_RAM
selftest
2x7Y DCACHE_RAM
2x71 DCACHE_RAM_DATA_ERR
ror
2x72 DCACHE_RAM_TAG_ERR
2x77 DCACHE_ALT_WRITE2
2x80 DTAG
2x88 DCACHE_ALT_READ20
2x90 CACHE_DERR
est
2x99 DCACHE_ALT_WRITE3
2xA0 PM_CACHE_TESTS
2xAA DCACHE_ALT_READ3
2xA1-2xA2 PM_RAM_TEST
2xA3-2xA6 PM_PTR_TEST
2xA7-2xA8 PM_CAM_TEST
2xB0 DCACHE_PARITY
2xB1 DCACHE_EVEN_TAG_PARITY
82
Icache tag selftest
Icache parity error
Dcache store queue
Dcache store queue
D=data,
Address in error[0:15]
Address in error[16:31]
Expected data[0:15]
Expected data[16:31]
Expected data[32:47]
Expected data[48:63]
Actual data[0:15]
Actual data[16:31]
Actual data[32:47]
Actual data[48:63]
Dcache Address line
Dcache Address line
Dcache Address line
D=data
Control Address[0:15]
Control Address[16:31]
Test Address[0:15]
Test Address[16:31]
Actual data[0:15]
Actual data[16:31]
Actual data[32:47]
Actual data[48:63]
Meaning
Starting Dcache RAM
Y = forward progress
Dcache RAM date er-
Dcache RAM tag error
Dcache tag selftest
Dcache error selft-
PM cache selftest
PM RAM selftest
PM Pointer selftest
PM CAM selftest
Dcache parity error