4.4.
XDP Debug Header
The debug port is a connection into a target-system environment that provides access to JTAG, run control, system
control, and observation resources. The XDP target system connector is a Samtec™ 60-pin BSH-030-01 series
connector.
Pin
XDP Signal
Target Signal
1
GND
GND
3
OBSFN_A0
PREQ#
5
OBSFN_A1
PRDY#
7
GND
GND
9
OBSDATA_A0
CFG[0]
11
OBSDATA_A1
CFG[1]
13
GND
GND
15
OBSDATA_A2
CFG[2]
17
OBSDATA_A3
CFG[3]
19
GND
GND
21
OBSFN_B0
BPM#[0]
23
OBSFN_B1
BPM#[1]
25
GND
GND
27
OBSDATA_B0
CFG[4]
29
OBSDATA_B1
CFG[5]
31
GND
GND
33
OBSDATA_B2
CFG[6]
35
OBSDATA_B3
CFG[7]
37
GND
GND
39
HOOK0
PWRGOOD
41
HOOK11
BP_PWRGD_RST#
43
VCC_OBS_AB
VCCIO_OUT
45
HOOK2
PWR_DEBUG
47
HOOK3
PCH_SYS_PWROK
49
GND
GND
51
SDA1
SDA
53
SCL1
SCL
55
TCK1
Open
57
TCK0
TCK
59
GND
GND
Notes:
1. These signals are optional, can be left as OPEN/No-Connect if debug by Intel will not be needed.
2. These CFG signals can be left as Open/No Connect if not used as a strapping signal and top side probe
will be used to debug processor.
Refer to the "Shark Bay, Denlow and Broadwell U/Y Platforms Debug Port Design Guide", Document Number: 479493, Revision: 2.0
32
I/O
Device
NA
I/O
Processor
I/O
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
1
I/O
Processor
1
I/O
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
I
System
O
System
I
System
O
Processor
O
System
NA
I/O
System
I/O
System
NA
O
Processor
NA
Table 4: XDP Debug Header Pin Definition
Pin
XDP Signal
Target Signal
2
GND
GND
4
OBSFN_C0
CFG[17]
6
OBSFN_C1
CFG[16]
8
GND
GND
10
OBSDATA_C0
CFG[8]
12
OBSDATA_C1
CFG[9]
14
GND
GND
16
OBSDATA_C2
CFG[10]
18
OBSDATA_C3
CFG[11]
20
GND
GND
22
OBSFN_D0
CFG[19]
24
OBSFN_D1
CFG[18]
26
GND
GND
28
OBSDATA_D0
CFG[12]
30
OBSDATA_D1
CFG[13]
32
GND
GND
34
OBSDATA_D2
CFG[14]
36
OBSDATA_D3
CFG[15]
38
GND
GND
40
ITPCLK/HOOK4
Open
42
ITPCLK#/HOOK5
Open
44
VCC_OBS_CD
VCCIO_OUT
46
HOOK6/RESET#
PLTRSTIN#
48
HOOK7/DBR#
DBR#
50
GND
GND
52
TDO
TDO
54
TRSTn
TRST#
56
TDI
TDI
58
TMS
TMS
60
GND
GND (or
XDP_PRESENT#
if required)
I/O
Device
NA
2
I
Processor
2
I
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
2
I
Processor
2
I
Processor
NA
2
I/O
Processor
2
I/O
Processor
NA
NA
NA
I
System
I
System
O
System
NA
I
Processor
O
Processor
O
Processor
O
Processor
NA
Connector Pinouts on Module
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