ADLINK Technology cExpress-KL User Manual page 22

3.3.6. PCI Express
Signal Pin
PCIE_TX0+ A68
PCIE_TX0- A69
PCIE_RX0+ B68
PCIE_RX0- B69
PCIE_TX1+ A64
PCIE_TX1- A65
PCIE_RX1+ B64
PCIE_RX1- B65
PCIE_TX2+ A61
PCIE_TX2- A62
PCIE_RX2+ B61
PCIE_RX2- B62
PCIE_TX3+ A58
PCIE_TX3- A59
PCIE_RX3+ B58
PCIE_RX3- B59
PCIE_TX4+ A55
PCIE_TX4- A56
PCIE_RX4+ B55
PCIE_RX4- B56
PCIE_TX5+ A52
PCIE_TX5- A53
PCIE_RX5+ B52
PCIE_RX5- B53
PCIE_CLK_REF+ A88
PCIE_CLK_REF- A89
3.3.7. Express Card
Signal Pin
EXCD0_CPPE# A49
EXCD1_CPPE# B48
EXCD0_PERST# A48
EXCD1_PERST# B47
16
Description
PCI Express channel 0, Transmit Output
differential pair.
PCI Express channel 0, Receive Input
differential pair.
PCI Express channel 1, Transmit Output
differential pair.
PCI Express channel 1, Receive Input
differential pair.
PCI Express channel 2, Transmit Output
differential pair.
PCI Express channel 2, Receive Input
differential pair.
PCI Express channel 3, Transmit Output
differential pair.
PCI Express channel 3, Receive Input
differential pair.
PCI Express channel 4, Transmit Output
differential pair.
PCI Express channel 4, Receive Input
differential pair.
PCI Express channel 5, Transmit Output
differential pair.
PCI Express channel 5, Receive Input
differential pair.
PCI Express Reference Clock output for all
PCI Express and PCI Express Graphics
Lanes.
Description
PCI ExpressCard: PCI Express capable card
request
PCI ExpressCard: reset
I/O PU/PD Comment
O PCIE AC coupled on Module
I PCIE AC coupled off Module
O PCIE AC coupled on Module
I PCIE AC coupled off Module
O PCIE AC coupled on Module
I PCIE AC coupled off Module
O PCIE AC coupled on Module
I PCIE AC coupled off Module
O PCIE AC coupled on Module
I PCIE AC coupled off Module
O PCIE PCIe port 5 is used by
LAN by default. build
option supports PCIe
port5
I PCIE PCIe port 5 is used by
LAN by default. build
option supports PCIe
port5
O PCIE
I/O PU/PD Comment
I 3.3V PU 10k
3.3V
O 3.3V
Pinouts and Signal Descriptions