ADLINK Technology cExpress-KL User Manual page 20

3.3.3. LVDS/eDP
Signal Pin
LVDS_A0+ A71
LVDS_A0- A72
LVDS_A1+ A73
LVDS_A1- A74
LVDS_A2+ A75
LVDS_A2- - A76
LVDS_A3+ A78
LVDS_A3- A79
LVDS_A_CK+ A81
LVDS_A_CK-
A82
LVDS_B0+ B71
LVDS_B0- B72
LVDS_B1+ B73
LVDS_B1- B74
LVDS_B2+ B75
LVDS_B2- B76
LVDS_B3+ B77
LVDS_B3- B78
LVDS_B_CK+ B81
LVDS_B_CK- B82
LVDS_VDD_EN A77
LVDS_BKLT_EN B79
LVDS_BKLT_CTRL B83
LVDS_I2C_CK A83
LVDS_I2C_DAT A84
eDP Build Option Signal Descriptions
Signal Pin
eDP_TX2+ A71
eDP_TX2- A72
eDP_TX1+ A73
eDP_TX1- A74
eDP_TX0+ A75
eDP_TX0-- A76
eDP_TX3+ A81
eDP_TX3--
A82
eDP_VDD_EN A77
eDP_BKLT_EN B79
eDP_BKLT_CTRL B83
eDP_AUX+ A83
eDP_AUX- A84
eDP_HPD A87
14
Description
LVDS Channel A differential pairs
LVDS Channel A differential clock
LVDS Channel B differential pairs
LVDS Channel B differential clock
LVDS panel power enable
LVDS panel backlight enable
LVDS panel backlight brightness control
DDC lines used for flat panel detection
and control.
DDC lines used for flat panel detection
and control.
Description
eDP differential pairs
eDP differential pairs
eDP power enable
eDP backlight enable
eDP backlight brightness control
eDP AUX+
eDP AUX-
Detection of Hot Plug / Unplug and
notification of the link layer
I/O PU/PD
O
LVDS
O
LVDS
O
LVDS
O
LVDS
O 3.3V
O 3.3V
O 3.3V PD 100K
O 3.3V PU 2k2 3.3V
I/O PU 2k2 3.3V
3.3V
I/O PU/PD
O PCIE
O PCIE
O 3.3V
O 3.3V
O 3.3V PD 100K
I/O
PCIE
I/O
PCIE
I 3.3V PD 100K
Pinouts and Signal Descriptions
Comment
LVDS is default.
(through eDP to
LVDS bridge)
Note: eDP support
is a build option
Comment
AC coupled off
module
AC coupled off
module
AC coupled off
module
AC coupled off
module