Physical Layer Interface - 3Com CoreBuilder 7000 Operation Manual

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PPENDIX ROTOCOLS AND
DS-3 Physical Layer
Interface
I
NTERFACES


Cell Delineation: This function permits the identification of cell
boundaries in the payload. It uses the Header Error Control (HEC) field
in the cell header.


Path Signal Identification: An integrity check is performed on the
end-to-end signal.


Cell Mapping: The mapping of ATM cells is performed by aligning
every cell with the byte structure of the SONET STS-3c payload
capacity. Because the STS-3c payload capacity is not an integer
multiple of the cell length, a cell may cross a payload boundary.


Cell Scrambling/Descrambling: This function permits the
randomization of the cell payload to avoid continuous non-variable bit
patterns and improve the efficiency of the cell delineation algorithm.


Transmission Frame Generation and Recovery: This function builds the
frame, sends and recovers it from the physical media.


Bit Timing and Line Coding: Perform the transmission and recovery of
data to and from the serial line based on physical line coding (NRZ).
The ATM SONET physical layer interface can be over UTP-5. In addition,
numerous optical interfaces (e.g., Multi Mode, Single Mode) can be used.
The SDH-STM-1 is a physical layer similar to the SONET-STS-3c with some
differences in frame fields. The SDH-STM-1 is usually used in Europe.
DS-3 is an important interface as it is widely deployed on public UNIs.
Although the DS-3 rate is 44.76 Mbps, the nominal bit rate available for
the transport of ATM cells is 40.704 Mbps. This is due to the overhead
induced by the Physical Layer Convergence Protocol (PLCP). The PLCP for
DS-3 defines the mapping of ATM cells onto existing DS-3 facilities.
Mapping of ATM cells into the DS-3 is accomplished by inserting the 53
bytes of ATM cells into the DS-3 PLCP. The PLCP is then mapped into the
DS-3 information payload. Extraction of ATM cells from the DS-3 operates
by framing on the PLCP and then extracting the ATM cells directly.
The functions of the DS-3 physical layer include:


HEC Generation and Verification: The Header Error Control (HEC) byte
protects the entire cell header. It is capable of one bit error detection
based on the HEC field.