Xilinx Virtex-7 VC7222 User Manual page 55

VC7222 Transceiver Characterization Board
UG965 (v1.4) February 11, 2015
set_property IOSTANDARD
set_property PACKAGE_PIN AK8
set_property IOSTANDARD
set_property PACKAGE_PIN AL8
set_property IOSTANDARD
set_property PACKAGE_PIN AE6
set_property IOSTANDARD
set_property PACKAGE_PIN AF5
set_property IOSTANDARD
set_property PACKAGE_PIN AG1
set_property IOSTANDARD
set_property PACKAGE_PIN AH1
set_property IOSTANDARD
set_property PACKAGE_PIN AJ11
set_property IOSTANDARD
set_property PACKAGE_PIN AJ10
set_property IOSTANDARD
#SWITCHES
set_property PACKAGE_PIN AD26
set_property IOSTANDARD
set_property PACKAGE_PIN AE26
set_property IOSTANDARD
set_property PACKAGE_PIN AC26
set_property IOSTANDARD
set_property PACKAGE_PIN AC27
set_property IOSTANDARD
set_property PACKAGE_PIN AE27
set_property IOSTANDARD
set_property PACKAGE_PIN AF27
set_property IOSTANDARD
set_property PACKAGE_PIN AG27
set_property IOSTANDARD
set_property PACKAGE_PIN AH27
set_property IOSTANDARD
#BUTTONS
set_property PACKAGE_PIN AL22
set_property IOSTANDARD
set_property PACKAGE_PIN AM22
set_property IOSTANDARD
#SMAs
set_property PACKAGE_PIN AK32
set_property IOSTANDARD
set_property PACKAGE_PIN AL32
set_property IOSTANDARD
set_property PACKAGE_PIN AK3
set_property IOSTANDARD
set_property PACKAGE_PIN AL3
set_property IOSTANDARD
#SYSTEM CLOCKS
set_property PACKAGE_PIN AL24
set_property IOSTANDARD
set_property PACKAGE_PIN AL25
set_property IOSTANDARD
#LEDs
set_property PACKAGE_PIN AH26
set_property IOSTANDARD
set_property PACKAGE_PIN AJ26
set_property IOSTANDARD
set_property PACKAGE_PIN AM25
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LVCMOS18 [get_ports CM_CTRL_23]
[get_ports CM_LVDS1_P]
LVDS [get_ports CM_LVDS1_P]
[get_ports CM_LVDS1_N]
LVDS [get_ports CM_LVDS1_N]
[get_ports CM_LVDS2_P]
LVDS [get_ports CM_LVDS2_P]
[get_ports CM_LVDS2_N]
LVDS [get_ports CM_LVDS2_N]
[get_ports CM_LVDS3_P]
LVDS [get_ports CM_LVDS3_P]
[get_ports CM_LVDS3_N]
LVDS [get_ports CM_LVDS3_N]
[get_ports CM_GCLK_P]
LVDS [get_ports CM_GCLK_P]
[get_ports CM_GCLK_N]
LVDS [get_ports CM_GCLK_N]
[get_ports USER_SW1]
LVCMOS18 [get_ports USER_SW1]
[get_ports USER_SW2]
LVCMOS18 [get_ports USER_SW2]
[get_ports USER_SW3]
LVCMOS18 [get_ports USER_SW3]
[get_ports USER_SW4]
LVCMOS18 [get_ports USER_SW4]
[get_ports USER_SW5]
LVCMOS18 [get_ports USER_SW5]
[get_ports USER_SW6]
LVCMOS18 [get_ports USER_SW6]
[get_ports USER_SW7]
LVCMOS18 [get_ports USER_SW7]
[get_ports USER_SW8]
LVCMOS18 [get_ports USER_SW8]
[get_ports USER_PB1]
LVCMOS18 [get_ports USER_PB1]
[get_ports USER_PB2]
LVCMOS18 [get_ports USER_PB2]
[get_ports CLK_DIFF_1_P]
LVDS [get_ports CLK_DIFF_1_P]
[get_ports CLK_DIFF_1_N]
LVDS [get_ports CLK_DIFF_1_N]
[get_ports CLK_DIFF_2_P]
LVDS [get_ports CLK_DIFF_2_P]
[get_ports CLK_DIFF_2_N]
LVDS [get_ports CLK_DIFF_2_N]
[get_ports LVDS_OSC_P]
LVDS [get_ports LVDS_OSC_P]
[get_ports LVDS_OSC_N]
LVDS [get_ports LVDS_OSC_N]
[get_ports APP_LED1]
LVCMOS18 [get_ports APP_LED1]
[get_ports APP_LED2]
LVCMOS18 [get_ports APP_LED2]
[get_ports APP_LED3]
VC7222 Board XDC Listing
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