Xilinx Virtex-7 VC7222 User Manual page 31

GTZ Transceivers and Reference Clocks
Callout 7,
The VC7222 board provides access to all GTZ transceiver and reference clock pins on the
FPGA as shown in
RX-TX lanes. Eight lanes are referred to as an Octal.
Note:
X-Ref Target - Figure 1-17
VC7222 Transceiver Characterization Board
UG965 (v1.4) February 11, 2015
Figure 1-2.
Figure 1-17. The GTZ transceivers are grouped into one set of eight
Figure 1-17 is for reference only and might not reflect the current revision of the board.
CLKO
OCTAL_300B
Figure 1-17: GTZ Quad Locations
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CLK1
OCTAL_300A
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Detailed Description
UG965_c1_17_010212
31