Xilinx Virtex-7 VC7222 User Manual page 51

Fpga gth and gtz transceiver characterization board
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VC7222 Transceiver Characterization Board
UG965 (v1.4) February 11, 2015
set_property PACKAGE_PIN AG34
set_property IOSTANDARD
set_property PACKAGE_PIN AH34
set_property IOSTANDARD
set_property PACKAGE_PIN AM32
set_property IOSTANDARD
set_property PACKAGE_PIN AN32
set_property IOSTANDARD
set_property PACKAGE_PIN AL34
set_property IOSTANDARD
set_property PACKAGE_PIN AM34
set_property IOSTANDARD
set_property PACKAGE_PIN AJ33
set_property IOSTANDARD
set_property PACKAGE_PIN AJ34
set_property IOSTANDARD
set_property PACKAGE_PIN AN33
set_property IOSTANDARD
set_property PACKAGE_PIN AP33
set_property IOSTANDARD
set_property PACKAGE_PIN AM29
set_property IOSTANDARD
set_property PACKAGE_PIN AN29
set_property IOSTANDARD
set_property PACKAGE_PIN AJ20
set_property IOSTANDARD
set_property PACKAGE_PIN AK20
set_property IOSTANDARD
set_property PACKAGE_PIN AA20
set_property IOSTANDARD
set_property PACKAGE_PIN AB20
set_property IOSTANDARD
set_property PACKAGE_PIN AF19
set_property IOSTANDARD
set_property PACKAGE_PIN AG19
set_property IOSTANDARD
set_property PACKAGE_PIN AK18
set_property IOSTANDARD
set_property PACKAGE_PIN AL18
set_property IOSTANDARD
set_property PACKAGE_PIN AP20
set_property IOSTANDARD
set_property PACKAGE_PIN AP21
set_property IOSTANDARD
set_property PACKAGE_PIN AN19
set_property IOSTANDARD
set_property PACKAGE_PIN AP19
set_property IOSTANDARD
set_property PACKAGE_PIN AN18
set_property IOSTANDARD
set_property PACKAGE_PIN AP18
set_property IOSTANDARD
set_property PACKAGE_PIN AJ18
set_property IOSTANDARD
set_property PACKAGE_PIN AJ19
set_property IOSTANDARD
set_property PACKAGE_PIN AD20
set_property IOSTANDARD
set_property PACKAGE_PIN AE20
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[get_ports FMC2_LA11_P]
LVCMOS18 [get_ports FMC2_LA11_P]
[get_ports FMC2_LA11_N]
LVCMOS18 [get_ports FMC2_LA11_N]
[get_ports FMC2_LA12_P]
LVCMOS18 [get_ports FMC2_LA12_P]
[get_ports FMC2_LA12_N]
LVCMOS18 [get_ports FMC2_LA12_N]
[get_ports FMC2_LA13_P]
LVCMOS18 [get_ports FMC2_LA13_P]
[get_ports FMC2_LA13_N]
LVCMOS18 [get_ports FMC2_LA13_N]
[get_ports FMC2_LA14_P]
LVCMOS18 [get_ports FMC2_LA14_P]
[get_ports FMC2_LA14_N]
LVCMOS18 [get_ports FMC2_LA14_N]
[get_ports FMC2_LA15_P]
LVCMOS18 [get_ports FMC2_LA15_P]
[get_ports FMC2_LA15_N]
LVCMOS18 [get_ports FMC2_LA15_N]
[get_ports FMC2_LA16_P]
LVCMOS18 [get_ports FMC2_LA16_P]
[get_ports FMC2_LA16_N]
LVCMOS18 [get_ports FMC2_LA16_N]
[get_ports FMC2_LA17_CC_P]
LVCMOS18 [get_ports FMC2_LA17_CC_P]
[get_ports FMC2_LA17_CC_N]
LVCMOS18 [get_ports FMC2_LA17_CC_N]
[get_ports FMC2_LA18_CC_P]
LVCMOS18 [get_ports FMC2_LA18_CC_P]
[get_ports FMC2_LA18_CC_N]
LVCMOS18 [get_ports FMC2_LA18_CC_N]
[get_ports FMC2_LA19_P]
LVCMOS18 [get_ports FMC2_LA19_P]
[get_ports FMC2_LA19_N]
LVCMOS18 [get_ports FMC2_LA19_N]
[get_ports FMC2_LA20_P]
LVCMOS18 [get_ports FMC2_LA20_P]
[get_ports FMC2_LA20_N]
LVCMOS18 [get_ports FMC2_LA20_N]
[get_ports FMC2_LA21_P]
LVCMOS18 [get_ports FMC2_LA21_P]
[get_ports FMC2_LA21_N]
LVCMOS18 [get_ports FMC2_LA21_N]
[get_ports FMC2_LA22_P]
LVCMOS18 [get_ports FMC2_LA22_P]
[get_ports FMC2_LA22_N]
LVCMOS18 [get_ports FMC2_LA22_N]
[get_ports FMC2_LA23_P]
LVCMOS18 [get_ports FMC2_LA23_P]
[get_ports FMC2_LA23_N]
LVCMOS18 [get_ports FMC2_LA23_N]
[get_ports FMC2_LA24_P]
LVCMOS18 [get_ports FMC2_LA24_P]
[get_ports FMC2_LA24_N]
LVCMOS18 [get_ports FMC2_LA24_N]
[get_ports FMC2_LA25_P]
LVCMOS18 [get_ports FMC2_LA25_P]
[get_ports FMC2_LA25_N]
VC7222 Board XDC Listing
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