Xilinx Virtex-7 VC7222 User Manual page 43

Default Jumper and Switch Settings
Table A-1
operation. These jumpers must be installed except where specifically noted in this user
guide.
Note:
Table A-1: Default Jumper Settings
Reference Designator
J4 UTIL_3V3
J184 UTIL_2V5
J24 UTIL_5V0
J66 PMBUS CTRL
J48
J49
J50
J68
J141 VCCADC SELECT
J142 VREF SEL
J23 SPI LVL TRNS INH
J8 SPI LVL TRNS INH
J195 VTT_HP SOURCE
DIP switch SW10 enables the supply of onboard core power to the FPGA. For normal
operation positions 1 through 6 must be set to the ON position as shown in
X-Ref Target - Figure A-1
VC7222 Transceiver Characterization Board
UG965 (v1.4) February 11, 2015
lists the jumpers that must be installed on the VC7222 board for proper
Any jumper not listed in Table A-1
Name Board Location
Upper Left
Upper Left
Upper Left
Center Left
Center Left
Center Left
Upper Right
Center Right
Lower Left
Lower Left
Upper Right
Center Right
Center Right
SW10
Figure A-1: Default Switch Settings
www.xilinx.com
Appendix A
should be left open for normal operation.
Jumper
AFX (1-2)
AFX (1-2)
AFX (1-2)
GND (2-3)
POR (1-2)
POR (1-2)
POR (1-2)
POR (1-2)
VCCAUX (1-2)
REG (1-2)
Installed
Installed
GND (1-2)
VCCINT
VCCAUX
VCCBRAM
VCCAUX_IO
VCCO_HP
VCCO_0
NC
NC
UG965_aA_01_121912
Comments
Red 20A jumper
Figure A-1.
43
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