Xilinx Virtex-7 VC7222 User Manual page 52
Fpga gth and gtz transceiver characterization board
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Also See for Virtex-7 VC7222:
- Getting started manual (74 pages) ,
- Getting started manual (46 pages) ,
- Getting started manual (68 pages)
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Appendix C: Master Constraints File Listing
52
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set_property IOSTANDARD
set_property PACKAGE_PIN AH21
set_property IOSTANDARD
set_property PACKAGE_PIN AJ21
set_property IOSTANDARD
set_property PACKAGE_PIN AF20
set_property IOSTANDARD
set_property PACKAGE_PIN AG20
set_property IOSTANDARD
set_property PACKAGE_PIN AK21
set_property IOSTANDARD
set_property PACKAGE_PIN AK22
set_property IOSTANDARD
set_property PACKAGE_PIN AB21
set_property IOSTANDARD
set_property PACKAGE_PIN AC21
set_property IOSTANDARD
set_property PACKAGE_PIN AD21
set_property IOSTANDARD
set_property PACKAGE_PIN AE21
set_property IOSTANDARD
set_property PACKAGE_PIN AB22
set_property IOSTANDARD
set_property PACKAGE_PIN AC22
set_property IOSTANDARD
set_property PACKAGE_PIN AG22
set_property IOSTANDARD
set_property PACKAGE_PIN AH22
set_property IOSTANDARD
set_property PACKAGE_PIN AE22
set_property IOSTANDARD
set_property PACKAGE_PIN AF22
set_property IOSTANDARD
#FMC2 HA
set_property PACKAGE_PIN AM19
set_property IOSTANDARD
set_property PACKAGE_PIN AM20
set_property IOSTANDARD
set_property PACKAGE_PIN AM21
set_property IOSTANDARD
set_property PACKAGE_PIN AN21
set_property IOSTANDARD
set_property PACKAGE_PIN AC18
set_property IOSTANDARD
set_property PACKAGE_PIN AD18
set_property IOSTANDARD
set_property PACKAGE_PIN AH18
set_property IOSTANDARD
set_property PACKAGE_PIN AH19
set_property IOSTANDARD
set_property PACKAGE_PIN AC19
set_property IOSTANDARD
set_property PACKAGE_PIN AD19
set_property IOSTANDARD
set_property PACKAGE_PIN AE18
set_property IOSTANDARD
set_property PACKAGE_PIN AF18
set_property IOSTANDARD
set_property PACKAGE_PIN AK26
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LVCMOS18 [get_ports FMC2_LA25_N]
[get_ports FMC2_LA26_P]
LVCMOS18 [get_ports FMC2_LA26_P]
[get_ports FMC2_LA26_N]
LVCMOS18 [get_ports FMC2_LA26_N]
[get_ports FMC2_LA27_P]
LVCMOS18 [get_ports FMC2_LA27_P]
[get_ports FMC2_LA27_N]
LVCMOS18 [get_ports FMC2_LA27_N]
[get_ports FMC2_LA28_P]
LVCMOS18 [get_ports FMC2_LA28_P]
[get_ports FMC2_LA28_N]
LVCMOS18 [get_ports FMC2_LA28_N]
[get_ports FMC2_LA29_P]
LVCMOS18 [get_ports FMC2_LA29_P]
[get_ports FMC2_LA29_N]
LVCMOS18 [get_ports FMC2_LA29_N]
[get_ports FMC2_LA30_P]
LVCMOS18 [get_ports FMC2_LA30_P]
[get_ports FMC2_LA30_N]
LVCMOS18 [get_ports FMC2_LA30_N]
[get_ports FMC2_LA31_P]
LVCMOS18 [get_ports FMC2_LA31_P]
[get_ports FMC2_LA31_N]
LVCMOS18 [get_ports FMC2_LA31_N]
[get_ports FMC2_LA32_P]
LVCMOS18 [get_ports FMC2_LA32_P]
[get_ports FMC2_LA32_N]
LVCMOS18 [get_ports FMC2_LA32_N]
[get_ports FMC2_LA33_P]
LVCMOS18 [get_ports FMC2_LA33_P]
[get_ports FMC2_LA33_N]
LVCMOS18 [get_ports FMC2_LA33_N]
[get_ports FMC2_HA00_CC_P]
LVCMOS18 [get_ports FMC2_HA00_CC_P]
[get_ports FMC2_HA00_CC_N]
LVCMOS18 [get_ports FMC2_HA00_CC_N]
[get_ports FMC2_HA01_CC_P]
LVCMOS18 [get_ports FMC2_HA01_CC_P]
[get_ports FMC2_HA01_CC_N]
LVCMOS18 [get_ports FMC2_HA01_CC_N]
[get_ports FMC2_HA02_P]
LVCMOS18 [get_ports FMC2_HA02_P]
[get_ports FMC2_HA02_N]
LVCMOS18 [get_ports FMC2_HA02_N]
[get_ports FMC2_HA03_P]
LVCMOS18 [get_ports FMC2_HA03_P]
[get_ports FMC2_HA03_N]
LVCMOS18 [get_ports FMC2_HA03_N]
[get_ports FMC2_HA04_P]
LVCMOS18 [get_ports FMC2_HA04_P]
[get_ports FMC2_HA04_N]
LVCMOS18 [get_ports FMC2_HA04_N]
[get_ports FMC2_HA05_P]
LVCMOS18 [get_ports FMC2_HA05_P]
[get_ports FMC2_HA05_N]
LVCMOS18 [get_ports FMC2_HA05_N]
[get_ports FMC2_HA06_P]
VC7222 Transceiver Characterization Board
UG965 (v1.4) February 11, 2015
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