Revision History - Xilinx Virtex-7 VC7222 User Manual

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Revision History

The following table shows the revision history for this document.
Date Version
01/25/2013 1.0
01/30/2013 1.0.1
07/23/2013 1.1
09/20/2013 1.1.1
12/18/2013 1.2
08/21/2014 1.3
02/11/2015 1.4
VC7222 Transceiver Characterization Board
Initial Xilinx release.
Corrected callout links located throughout the body text back to
Added answer record link in
In Table 1-4, changed nominal voltage to 1.075 V. In
and MGTZVCCL voltages to 1.075V. Added a footnote about critical signals to
and Table 1-21. In Appendix
Constraints (XDC) information. Updated links.
Updated the Virtex-7 FPGA VC7222 IBERT Getting Started Guide (Vivado Design Suite)
(UG971) link in Appendix D, Additional
Revised Table 1-7 through
Table 1-21. Updated references in
Declaration of Conformity link in
The number of 7 series GTH power modules from third-party vendors supplied
with the VC7222 board changed from four to two. Appendix C was renamed
Constraints File Listing. Intersil and Lineage vendors were removed from
References, page 61.
Two power modules are provided with the VC7222 board—Texas Instruments
PMP6577 and Bellnix BPE-37 (for
and 7 Series GTZ Transceiver Power Module, page
Listing, page 47.
www.xilinx.com
Revision
References, page 61.
Figure
C, replaced user constraints file (UCF) with Xilinx Design
Resources.
Table 1-12, Table 1-18, and
Appendix D, Additional
Appendix E, Regulatory and Compliance
7 Series GTH Transceiver Power Module, page 13
Table 1-1, page
1-3, changed MGTZAVCC
Table 1-20
Table 1-19. Rearranged rows in
Resources. Updated the
Information.
15. Updated VC7222 Board XDC
UG965 (v1.4) February 11, 2015
7.
Master