Xilinx Virtex-7 VC7222 User Manual page 48
Fpga gth and gtz transceiver characterization board
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Also See for Virtex-7 VC7222:
- Getting started manual (74 pages) ,
- Getting started manual (43 pages) ,
- Getting started manual (44 pages)
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Appendix C: Master Constraints File Listing
48
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set_property IOSTANDARD
set_property PACKAGE_PIN AG7
set_property IOSTANDARD
set_property PACKAGE_PIN AH7
set_property IOSTANDARD
set_property PACKAGE_PIN AE7
set_property IOSTANDARD
set_property PACKAGE_PIN AF7
set_property IOSTANDARD
set_property PACKAGE_PIN AK7
set_property IOSTANDARD
set_property PACKAGE_PIN AK6
set_property IOSTANDARD
set_property PACKAGE_PIN AF4
set_property IOSTANDARD
set_property PACKAGE_PIN AG4
set_property IOSTANDARD
set_property PACKAGE_PIN AH4
set_property IOSTANDARD
set_property PACKAGE_PIN AH3
set_property IOSTANDARD
set_property PACKAGE_PIN AG2
set_property IOSTANDARD
set_property PACKAGE_PIN AH2
set_property IOSTANDARD
set_property PACKAGE_PIN AM2
set_property IOSTANDARD
set_property PACKAGE_PIN AN2
set_property IOSTANDARD
set_property PACKAGE_PIN AM1
set_property IOSTANDARD
set_property PACKAGE_PIN AN1
set_property IOSTANDARD
set_property PACKAGE_PIN AJ1
set_property IOSTANDARD
set_property PACKAGE_PIN AK1
set_property IOSTANDARD
set_property PACKAGE_PIN AN3
set_property IOSTANDARD
set_property PACKAGE_PIN AP3
set_property IOSTANDARD
set_property PACKAGE_PIN AM6
set_property IOSTANDARD
set_property PACKAGE_PIN AM5
set_property IOSTANDARD
set_property PACKAGE_PIN AL7
set_property IOSTANDARD
set_property PACKAGE_PIN AM7
set_property IOSTANDARD
set_property PACKAGE_PIN AM4
set_property IOSTANDARD
set_property PACKAGE_PIN AN4
set_property IOSTANDARD
set_property PACKAGE_PIN AM16
set_property IOSTANDARD
set_property PACKAGE_PIN AM15
set_property IOSTANDARD
set_property PACKAGE_PIN AM14
set_property IOSTANDARD
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LVCMOS18 [get_ports FMC1_LA03_N]
[get_ports FMC1_LA04_P]
LVCMOS18 [get_ports FMC1_LA04_P]
[get_ports FMC1_LA04_N]
LVCMOS18 [get_ports FMC1_LA04_N]
[get_ports FMC1_LA05_P]
LVCMOS18 [get_ports FMC1_LA05_P]
[get_ports FMC1_LA05_N]
LVCMOS18 [get_ports FMC1_LA05_N]
[get_ports FMC1_LA06_P]
LVCMOS18 [get_ports FMC1_LA06_P]
[get_ports FMC1_LA06_N]
LVCMOS18 [get_ports FMC1_LA06_N]
[get_ports FMC1_LA07_P]
LVCMOS18 [get_ports FMC1_LA07_P]
[get_ports FMC1_LA07_N]
LVCMOS18 [get_ports FMC1_LA07_N]
[get_ports FMC1_LA08_P]
LVCMOS18 [get_ports FMC1_LA08_P]
[get_ports FMC1_LA08_N]
LVCMOS18 [get_ports FMC1_LA08_N]
[get_ports FMC1_LA09_P]
LVCMOS18 [get_ports FMC1_LA09_P]
[get_ports FMC1_LA09_N]
LVCMOS18 [get_ports FMC1_LA09_N]
[get_ports FMC1_LA10_P]
LVCMOS18 [get_ports FMC1_LA10_P]
[get_ports FMC1_LA10_N]
LVCMOS18 [get_ports FMC1_LA10_N]
[get_ports FMC1_LA11_P]
LVCMOS18 [get_ports FMC1_LA11_P]
[get_ports FMC1_LA11_N]
LVCMOS18 [get_ports FMC1_LA11_N]
[get_ports FMC1_LA12_P]
LVCMOS18 [get_ports FMC1_LA12_P]
[get_ports FMC1_LA12_N]
LVCMOS18 [get_ports FMC1_LA12_N]
[get_ports FMC1_LA13_P]
LVCMOS18 [get_ports FMC1_LA13_P]
[get_ports FMC1_LA13_N]
LVCMOS18 [get_ports FMC1_LA13_N]
[get_ports FMC1_LA14_P]
LVCMOS18 [get_ports FMC1_LA14_P]
[get_ports FMC1_LA14_N]
LVCMOS18 [get_ports FMC1_LA14_N]
[get_ports FMC1_LA15_P]
LVCMOS18 [get_ports FMC1_LA15_P]
[get_ports FMC1_LA15_N]
LVCMOS18 [get_ports FMC1_LA15_N]
[get_ports FMC1_LA16_P]
LVCMOS18 [get_ports FMC1_LA16_P]
[get_ports FMC1_LA16_N]
LVCMOS18 [get_ports FMC1_LA16_N]
[get_ports FMC1_LA17_CC_P]
LVCMOS18 [get_ports FMC1_LA17_CC_P]
[get_ports FMC1_LA17_CC_N]
LVCMOS18 [get_ports FMC1_LA17_CC_N]
[get_ports FMC1_LA18_CC_P]
LVCMOS18 [get_ports FMC1_LA18_CC_P]
VC7222 Transceiver Characterization Board
UG965 (v1.4) February 11, 2015
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