Input/Output Ports - Holtek HT46R003B Manual

Cost-effective a/d 8-bit otp mcu
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Input/Output Ports

Holtek microcontrollers offer considerable flexibility on their I/O ports. Most pins can have either an
input or output designation under user program control. Additionally, as there are pull-high resistors
and wake-up software configurations, the user is provided with an I/O structure to meet the needs of
a wide range of application possibilities.
The device provides bidirectional input/output lines labeled with port names PA and PB. These I/O
ports are mapped to the RAM Data Memory with specific addresses as shown in the Special Purpose
Data Memory table. All of these I/O ports can be used for input and output operations. For input
operation, these ports are non-latching, which means the inputs must be ready at the T2 rising edge
of instruction "MOV A, [m]", where m denotes the port address. For output operation, all the data is
latched and remains unchanged until the output latch is rewritten.
Register
Name
7
PA
PA7
PAC
PAC7
PAPU
PAWU
PAWU7
PB
PBC
PBPU
Pull-high Resistors
Many product applications require pull-high resistors for their switch inputs usually requiring the
use of an external resistor. To eliminate the need for these external resistors, all I/O pins, when
configured as an input have the capability of being connected to an internal pull-high resistor. These
pull-high resistors are selected using a registers PAPU and PBPU located in the Data Memory. The
pull-high resistors are implemented using weak PMOS transistors. Note that pin PA7 does not have
a pull-high resistor selection.
PAPU Register
Bit
7
Name
R/W
POR
Bit 7
Unimplemented, read as "0"
PAPU6~PAPU0: Port A bit 6~bit 0 pull-high control
Bit 6~0
0: Disable
1: Enable
Rev. 1.00
Cost-Effective A/D 8-bit OTP MCU
Bit
6
5
4
PA6
PA5
PA�
PAC6
PAC5
PAC�
PAPU6
PAPU5
PAPU�
PAWU6
PAWU5
PAWU�
PB5
PB�
PBC5
PBC�
PBPU5
PBPU�
I/O Registers List
6
5
4
PAPU6
PAPU5
PAPU�
R/W
R/W
R/W
0
0
0
30
HT46R003B
3
2
1
PA3
PA�
PA1
PAC3
PAC�
PAC1
PAPU3
PAPU�
PAPU1
PAWU3
PAWU�
PAWU1
PB3
PB�
PB1
PBC3
PBC�
PBC1
PBPU3
PBPU�
PBPU1
3
2
1
PAPU3
PAPU�
PAPU1
R/W
R/W
R/W
0
0
0
��ne 1�� �01�
0
PA0
PAC0
PAPU0
PAWU0
PB0
PBC0
PBPU0
0
PAPU0
R/W
0

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