Input/Output Ports; Pull-High Resistors - Holtek BS83A04C Manual

BS83A04C
4-Key Enhanced Touch I/O Flash MCU

Input/Output Ports

Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output
designation of every pin fully under user program control, pull-high selections for all ports and
wake-up selections on certain pins, the user is provided with an I/O structure to meet the needs of a
wide range of application possibilities.
The device provides bidirectional input/output lines labeled with port name PA. These I/O ports
are mapped to the RAM Data Memory with specific addresses as shown in the Special Purpose
Data Memory table. All of these I/O ports can be used for input and output operations. For input
operation, these ports are non-latching, which means the inputs must be ready at the T2 rising edge
of instruction "MOV A, [m]", where m denotes the port address. For output operation, all the data is
latched and remains unchanged until the output latch is rewritten.
Register
Name
7
PA PA7
PAC PAC7
PAPU PAPU7
PAWU PAWU7

Pull-high Resistors

Many product applications require pull-high resistors for their switch inputs usually requiring the
use of an external resistor. To eliminate the need for these external resistors, all I/O pins, when
configured as an input have the capability of being connected to an internal pull-high resistor. These
pull-high resistors are selected using the LVPUC and PAPU registers, and are implemented using
weak PMOS transistors. The PAPU register is used to determine whether the pull-high function
is enabled or not while the LVPUC register is used to select the pull-high resistors value for low
voltage power supply applications.
Note that the pull-high resistor can be controlled by the relevant pull-high control register only
when the pin-shared functional pin is selected as an input or NMOS output. Otherwise, the pull-high
resistors cannot be enabled.
• PAPU Register
Bit 7
Name PAPU7
R/W R/W
POR 0
Bit 7~0 PAPU7~PAPU0: PA7~PA0 pull-high function control
0: Disable
1: Enable
Rev. 1.00
Bit
6 5 4
PA6 PA5 PA4
PAC6 PAC5 PAC4
PAPU6 PAPU5 PAPU4
PAWU6 PAWU5 PAWU4
I/O Logic Function Register List
6 5 4
PAPU6 PAPU5 PAPU4
R/W R/W R/W
0 0 0
47
3 2 1
PA3 PA2 PA1
PAC3 PAC2 PAC1
PAPU3 PAPU2 PAPU1
PAWU3 PAWU2 PAWU1
3 2 1
PAPU3 PAPU2 PAPU1
R/W R/W R/W
0 0 0
March 24, 2020
0
PA0
PAC0
PAPU0
PAWU0
0
PAPU0
R/W
0