Gpio Dip Switch - Xilinx ZC702 User Manual

GPIO DIP Switch

[Figure 1-2, callout 19]
Figure 1-23 shows the GPIO DIP switch circuit.
X-Ref Target - Figure 1-23
Table 1-25 lists the GPIO DIP switch connections to XC7Z020 SoC U1.
Table 1-25: GPIO DIP Switch Connections to XC7Z020 SoC at U1
XC7Z020 (U1) Pin
W6
W7
ZC702 Board User Guide
UG850 (v1.7) March 27, 2019
GPIO_DIP_SW1
GPIO_DIP_SW0
R51
4.7kΩ
0.1 Ω
5%
GND
Figure 1-23: GPIO DIP Switch
Net Name I/O Standard
GPIO_DIP_SW0 LVCMOS25
GPIO_DIP_SW1 LVCMOS25
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Feature Descriptions
VADJ
SW12
1 4
2 3
R50
SDA02H1SBD
4.7kΩ
0.1 Ω
5%
UG850_c1_23_032719
DIP Switch SW12 Pin
2
1
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