Xilinx ZC702 User Manual page 4

Date Version
09/04/2015 1.5
01/03/2018 1.6
06/29/2018 1.6.1
03/27/2019 1.7
ZC702 Board User Guide
UG850 (v1.7) March 27, 2019
Added missing symbol font to fix improperly rendered text (kW, mF) to the correct
units (kΩ, μ F) in Table 1-6, rows 3 and 4. Removed base ambiguity from PMBUS
address numbers 52, 53, and 54 by updating them according to context to 52
decimal, 53 decimal, and 54 decimal or to binary 0b0110100, 0b0110101 and
0b0110110 in Table 1-19, in
Monitoring Voltage and Current, in
Fixed typographical error in
Editorial updates only. No technical content updates.
Updated Electrostatic Discharge Caution
Component Memory and LPC Connectors J3 and J4
of callout 1 in Table A-2. Appendix C
constraints file list is removed, and access instructions are added. Updated
Appendix E, Regulatory and Compliance
history date to 06/29/2018.
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Revision
Figure 1-29, in Table 1-30, in the first paragraph under
Table 1-31, in Table
Figure 1-1. Updated User PMOD GPIO
information. Updated the
sections. Updated the function
is renamed Xilinx Design
Information. Corrected the v1.6.1 revision
1-32, and in Table 1-33.
Headers.
DDR3
Constraints, the
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