Usb 2.0 Ulpi Transceiver - Xilinx ZC702 User Manual

Table 1-5: Quad SPI Flash Memory Connections to the XC7Z020 SoC (Cont'd)
XC7Z020 (U1)
Pin Name
PS_MIO3
PS_MIO2
PS_MIO1
Notes:
Each three-pin MIO select header has pin 1 wired to VCCMIO and pin 3 wired to GND.
The configuration and Quad SPI section of the Zynq-7000 SoC Technical Reference Manual
(UG585) [Ref 2]
Figure 1-6 shows the connections of the linear Quad SPI flash memory on the ZC702 board.
For more details, see the Micron N25Q128A11ESF40G data sheet at the Micron website
[Ref 14].
X-Ref Target - Figure 1-6
QSPI_IO3
QSPI_CS_B
QSPI_IO1

USB 2.0 ULPI Transceiver

[Figure 1-2, callout 4]
The ZC702 board uses a Standard Microsystems Corporation USB3320 USB 2.0 ULPI
Transceiver at U9 to support a USB connection to the host computer. A USB cable is
supplied in the ZC702 Evaluation Kit (Standard-A connector to host computer, Mini-B
connector to ZC702 board connector J1). The USB3320 is a high-speed USB 2.0 PHY
supporting the UTMI+ low pin interface (ULPI) interface standard. The ULPI standard
defines the interface between the USB controller IP and the PHY device which drives the
physical USB bus. Use of the ULPI standard reduces the interface pin count between the USB
controller IP and the PHY device.
ZC702 Board User Guide
UG850 (v1.7) March 27, 2019
Bank Pin Number
500 F6
500 A2
500 A1
provides details on using the Quad-SPI flash memory.
VCCMIO
C23
0.1μF 25V
X5R
R324
330Ω 5%
GND
1
2
3
4
5
6
7
8
Figure 1-6: 128 Mb Quad-SPI Flash Memory (U41)
www.xilinx.com
Quad-SPI Flash Memory (U41) MIO Select
Schematic
Net Name
Pin Number
QSPI_IO1 8
QSPI_IO0
15
QSPI_CS_B 7
U41
N25Q128A11ESF40G
128 Mb Serial
Flash Memory
16
C
HOLD_B/DQ3
15
DQ0
VCC
14
NC7
NC0
13
NC6
NC1
12
NC5
NC2
11
NC4
NC3
10
VSS
SB
9
WB/VPP/DQ2
DQ1
GND
Feature Descriptions
Header
Pin Name
DQ1 J20.2
DQ0 J21.2
S_B NA
QSPI_CLK
QSPI_IO0
QSPI_IO2
UG850_c1_06_032719
Send Feedback
22