Response Speed Of Counters; Handling Counters As Numeric Devices - Mitsubishi FX3U Series Programming Manual

Hide thumbs Also See for FX3U Series:
Table of Contents

Advertisement

FX
/FX
Series Programmable Controllers
3U
3UC
Programming Manual - Basic & Applied Instruction Edition
2. 32-bit counter
1) Specification by constant (K)
X003
2) Indirect specification (D)
X001
X003
4.6.6

Response speed of counters

Counters execute counting by cyclic operating for contact operations of internal signals X, Y, M, S, C, etc.
inside the PLC.
For example, when X011 is specified as counting input, its ON duration and OFF duration should be longer
than the cycle time of the PLC (which is tens of Hz or less usually).
On the other hand, high speed counters described later execute counting as an interrupt processing for
specific input, and can execute counting at 5 k to 6 kHz without regard to the cycle time.
4.6.7

Handling counters as numeric devices

Counters use output contacts operating in accordance with the set value or use the counter value (current
value) as numeric data for control.
The figure below shows the structure of the current value register of a counter. When a counter number is
specified in an operand of an applied instruction in execution, the counter is handled as a device storing 16-bit
or 32-bit data in the same way as data register.
A 32-bit counter is handled as 32-bit data.
1. Structure of register storing current value of counter
1) 16-bit
High
order
0
b15
*1
Sign
0: Positive
number
1: Negative
number
*1. The sign is valid only when a counter is handled as a substitute for data register.
2) 32-bit
High
order
0
b31
Sign
0: Positive
number
1: Negative
number
86
K43,210
C200
FNC 12
K43210 D5(D6)
DMOV
C200
D5(D6)
16 bits
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
Constant (decimal constant):
−2,147,483,648 to +2,147,483,647
43210 counts
Pairs of data registers are used for indirect specification.
Use a 32-bit instruction for writing the set value, and make
sure that the latter of paired registers (D6 in this example)
does not overlap in other programs because it's invisible in
ladder format.
→ For high speed counters, refer to Section 4.7.
Low
Available numeric value range
order
16-bit counter: 0 to 32767
0
1
0
1
32-bit counter: −2,147,483,648 to
b0
32 bits
1
1
1
1
0
0
0
0
1
0
1
4 Devices in Detail
4.6 Counter [C]
+2,147,483,647
Low
order
0
1
1
1
1
0
0
0
0
b0

Advertisement

Table of Contents
loading

This manual is also suitable for:

Fx3uc seriesMelsec-f

Table of Contents