Xilinx Virtex-7 FPGA VC7203 Getting Started Manual page 36

Characterization kit ibert
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13. In the Sources window, Design Sources should now reflect that the SuperClock-2
module is part of the example IBERT design
X-Ref Target - Figure 1-30
VC7203 IBERT Getting Started Guide
UG847 (Vivado Design Suite v2015.1) April 27, 2015
Chapter 1: VC7203 IBERT Getting Started Guide
Figure 1-30: Design Sources File Hierarchy
www.xilinx.com
(Figure
1-30).
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