Xilinx Virtex-7 FPGA VC7203 Getting Started Manual page 13

Configuring the FPGA
This section describes how to configure the FPGA using the SD card included with the
board. The FPGA can also be configured through the Vivado Design Suite software using
the .bit files and .ltx probe files available on the SD card, or online (as collection
rdf0272-vc7203-ibert-2015-1.zip) at the
Kit documentation
To configure from the SD card:
1. Insert the SD card provided with the VC7203 board into the SD card reader slot located
on the bottom-side (upper-right corner) of the VC7203 board.
2. Plug the 12V output from the power adapter into connector J2 on the VC7203 board.
3. Connect the host computer to the VC7203 board using a standard-A plug to Micro-B
plug USB cable. The standard-A plug connects to a USB port on the host computer and
the Micro-B plug connects to U8, the Digilent USB JTAG configuration port on the
VC7203 board.
4. Select the GTX IBERT demonstration with the System ACE™ SD controller SYSACE-2 CFG
switch, SW8. The setting on this 4-bit DIP switch
configure the FPGA. A switch is in the ON position if set to the far right and in the OFF
position if set to the far left. For the Quad 115 GTX IBERT demonstration, set
ADR2 = ON, ADR1 = OFF, and ADR0 = ON. The MODE bit (switch position 4) is not used
and can be set either ON or OFF.
X-Ref Target - Figure 1-9
There is one IBERT demonstration design for each GTX Quad on the VC7203 board, for a
total of seven IBERT designs. An additional design is provided to demonstrate the
USB/UART interface (details of this demonstration are described in the README file on the
SD card). All eight designs are organized and stored on the SD card as shown in
Table 1-1: SD Card Contents and Configuration Addresses
Demonstration Design
GTX Quad 113
GTX Quad 114
GTX Quad 115
VC7203 IBERT Getting Started Guide
UG847 (Vivado Design Suite v2015.1) April 27, 2015
website.
Figure 1-9: Configuration Address DIP Switch (SW8)
ADR2
ON
ON
ON
www.xilinx.com
Chapter 1: VC7203 IBERT Getting Started Guide
Virtex-7 FPGA VC7203 Characterization
(Figure 1-9) selects the file used to
ADR1
ON
ON
OFF
Table 1-1.
ADR0
ON
OFF
ON
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