Cpu; Flashepr6M; Buffered Sram; Dram - HP M2350A Service Manual

Understanding the Computer Module
The Function Cards
Flash
EPROM
1.5 Mb
Buffered SEAM
512 Kbytes
DRAM
2Mbytes
MPB
Interface
32KBytes FIFO-SRAM.
Output Register
8 bit for status LEDs, test signals and software reset signal
Bus Error Logic
Minimum 2ms to maximum 4ms delay forced bus error capacity (no delay)
Backup Time (for buffered SBAM)
Minimum of
3
hours
Power Consumption
4.5 Watts typical
Arrhythmia CPC (Slot 8) Specifications
CPU
68EC030 @ 24 MHz
Flash
EPROM
1.0 Mb
Btiered SBAM
768
Kbytes
Fast SRAM
128 Kbytes
DRAM
1 Mbyte
MPB Interface
32 KBytes FIFO-SRAM.
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