Hand Shake Function - Toshiba TX39 Series User Manual

TOSHIBA
In the reading-out by the DMA transfer, when receiving data of 4 bytes or 8 bytes are sent to the
receive FIFO buffer (when the write pointer (0-7) becomes 4 and 0), a DMA request is
generated and the receiving data are written in to the memory.
Specify the interrupt mode, DMA mode and DMA direction using the three SDMAE, TDIE and
RDIE bits. Transmit and Receive cannot be simultaneously set to DMA when in the DMA
mode.
The DMA controller settings must be dual address mode, external transfer request, and low-
level mode.
Table 12-4 Register bit setting and transmit/receive operation
TDIE RDIE
SDMA
E
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1

12.4.11 Hand shake function

By handshaking the CTS-RTS, the data transfer by the frame is made certain. This function is
valid when the HSE of the line mode register is 1.
When the CTS* pin becomes high level in transfer operation, the transfer is halted until the
CTS* pin becomes low after the completion of the currently conducted data transfer. At this
time also, however, next data are requested of the CPU by an interrupt or a DMA request.
When the receiving of one-frame data is completed in a receive operation, the RTS* pin is set to
high to request of the transferring side for a temporary halt of transfer. By changing the RTS*
pin to low when the receiving preparation is done, the transfer resumes.
Transmit
0 TDIS polling
1 TDIS polling
0 Interrupt (TDIS=1)
1 Interrupt (TDIS=1)
0
1 Interrupt (TDIS=1)
0 Write DMA (SDMA,TDIS=1)
1
TMPR3904F Rev. 2.0
RDIS polling
Interrupt (RDIS = 1)
RDIS polling
Interrupt (RDIS=1)
Setting prohibited
Read DMA (SDMA,RDIS=1)
Interrupt (RDIS=1)
Setting prohibited
188
Receive