Dma Control Register (Dcr) - Toshiba TX39 Series User Manual

TOSHIBA

10.3.1 DMA control register (DCR)

3 1 3 0
Rst
W
0
1 5
Mnemonic
Bit
31 Rst Reset
0
0
Name of
Field
Reset
Conducts software reset of the DMAC. The DMAC shall
be initialized when the Rst bit is set to 1. All the values
of the DMAC internal registers become the initial values.
Also, all transfer requests are canceled; and the two
channels become the stop status.
0: Ignores.
1: Initializes DMAC.
Fig. 10-3 DMA Control Register (DCR)
26
TMPR3904F Rev. 2.0
Description
121
1 6
: Type
: Initial
Value
0
: Type
: Initial
Value