Toshiba TX39 Series User Manual page 68

32bit risc microprocessor
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TOSHIBA
Bit
Mnemonic
5:3
DCS1
DRAM channel 1
size
2
16BUS1
DRAM channel 1
bus size
Reserved
1
DIM1
DRAM channel 1
0
DPM1
page mode select
Name of Field
DRAM Control Channel Size on Channel 1
Designates the total memory size to be assigned to
all of four banks on Channel 1.
000: 1 Mbytes 100: 16 Mbytes
001: 2 Mbytes 101: 32 Mbytes
010: 3 Mbytes 11*: Reserved
011: 8 Mbytes
DRAM Control 16-bit Width Bus Size on Channel
1
Designates the bus width of the memory to be
connected to Channel 1.
1: 16-bit width bus size
0: 32-bit width bus size
This bit is reserved. Do not set to 1.
DRAM Control Page Mode on Channel 1
Designates the page mode of the DRAM connected
to Channel 1.
1: Extended data output (EDO) mode
0: Fast page mode
Fig. 8-9 DRAM Control Register Channel 1 (2/2)
TMPR3904F Rev. 2.0
Description
60

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