Operations - Toshiba TX39 Series User Manual

TOSHIBA
10.5

Operations

The DMAC's operation is conducted synchronously with the rising edges of the SYSCLK.
10.5.1 Dual address mode
Memory to memory transfer
The following Fig. 9-22 shows the timing of one word in the case where the data are transferred
from a DRAM to another DRAM.
S Y S C L K
A[31:1]
R A S *
C A S *
W E *
D [31:0]
Fig. 10-22
R O W C O L
R e a d
Dual Address Mode (Memory → Memory)
26
TMPR3904F Rev. 2.0
R O W C O L
W r i t e
153