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TOSHIBA
11.2
Configuration
T X 3 9
P r o c e s s o r C o r e
I n t e r r u p t
r e q u e s t
5
N o n - m a s k a b l e
i n t e r r u p t r e q u e s t
The "detection circuit" detects the active status of the external interrupt request signal
(INT[7:0]). The active status can be selected from four kinds--the rising edge, the falling edge,
the high level, and the low level, and it is set up in the CConR of the EBIF.
The "IRC" is an interrupt controller. It arbitrates the priority of the seven external interrupts and
nine internal interrupts and informs the TX39 Processor Core of the interrupt with the highest
priority.
163
I R C
I n t e r r u p t l e v e l s e t - u p
I n t e r r u p t m a s k s e t - u p
• @ • @
P r i o r i t y p r o c e s s
B u s e r r o r i n w r i t e o p e r a t i o n
W a t c h d o g t i m e r i n t e r r u p t
Fig. 11-1
TX3904 Interrupt Block Diagram
TMPR3904F Rev. 2.0
I N T [ 0 ]
E x t e r n a l i n t e r r u p t s i g n a l
D e t e -
c t i o n
7
8
C i r c u i t
D M A C
4
S I O
2
T M R
3
N o n - m a s k a b l e i n t e r r u p t s i g n a l
T M R 2
I N T [ 7 : 0 ]
I n t e r n a l
i n t e r r u p t
s i g n a l s
N M I *
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