Xilinx Virtex-7 VC7203 User Manual page 52

Appendix C: Master Constraints File Listing
52
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set_property PACKAGE_PIN AM42 [get_ports FMC1_LA03_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA03_N]
set_property PACKAGE_PIN AR38 [get_ports FMC1_LA04_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA04_P]
set_property PACKAGE_PIN AR39 [get_ports FMC1_LA04_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA04_N]
set_property PACKAGE_PIN AN40 [get_ports FMC1_LA05_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA05_P]
set_property PACKAGE_PIN AN41 [get_ports FMC1_LA05_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA05_N]
set_property PACKAGE_PIN AR37 [get_ports FMC1_LA06_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA06_P]
set_property PACKAGE_PIN AT37 [get_ports FMC1_LA06_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA06_N]
set_property PACKAGE_PIN AM39 [get_ports FMC1_LA07_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA07_P]
set_property PACKAGE_PIN AN39 [get_ports FMC1_LA07_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA07_N]
set_property PACKAGE_PIN AP40 [get_ports FMC1_LA08_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA08_P]
set_property PACKAGE_PIN AR40 [get_ports FMC1_LA08_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA08_N]
set_property PACKAGE_PIN AP41 [get_ports FMC1_LA09_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA09_P]
set_property PACKAGE_PIN AP42 [get_ports FMC1_LA09_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA09_N]
set_property PACKAGE_PIN AT39 [get_ports FMC1_LA10_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA10_P]
set_property PACKAGE_PIN AT40 [get_ports FMC1_LA10_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA10_N]
set_property PACKAGE_PIN AR42 [get_ports FMC1_LA11_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA11_P]
set_property PACKAGE_PIN AT42 [get_ports FMC1_LA11_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA11_N]
set_property PACKAGE_PIN AW37 [get_ports FMC1_LA12_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA12_P]
set_property PACKAGE_PIN AY37 [get_ports FMC1_LA12_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA12_N]
set_property PACKAGE_PIN BA37 [get_ports FMC1_LA13_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA13_P]
set_property PACKAGE_PIN BB37 [get_ports FMC1_LA13_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA13_N]
set_property PACKAGE_PIN AW38 [get_ports FMC1_LA14_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA14_P]
set_property PACKAGE_PIN AY38 [get_ports FMC1_LA14_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA14_N]
set_property PACKAGE_PIN BB38 [get_ports FMC1_LA15_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA15_P]
set_property PACKAGE_PIN BB39 [get_ports FMC1_LA15_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA15_N]
set_property PACKAGE_PIN BA39 [get_ports FMC1_LA16_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA16_P]
set_property PACKAGE_PIN BA40 [get_ports FMC1_LA16_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA16_N]
set_property PACKAGE_PIN AK34 [get_ports FMC1_LA17_CC_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA17_CC_P]
set_property PACKAGE_PIN AL34 [get_ports FMC1_LA17_CC_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA17_CC_N]
set_property PACKAGE_PIN AJ33 [get_ports FMC1_LA18_CC_P]
www.xilinx.com VC7203 GTX Transceiver Characterization Board
UG957 (v1.3) October 17, 2014