Xilinx Virtex-7 VC7203 User Manual page 62

Appendix C: Master Constraints File Listing
62
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set_property PACKAGE_PIN AK15 [get_ports FMC3_LA04_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA04_P]
set_property PACKAGE_PIN AL14 [get_ports FMC3_LA04_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA04_N]
set_property PACKAGE_PIN AJ13 [get_ports FMC3_LA05_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA05_P]
set_property PACKAGE_PIN AJ12 [get_ports FMC3_LA05_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA05_N]
set_property PACKAGE_PIN AL16 [get_ports FMC3_LA06_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA06_P]
set_property PACKAGE_PIN AL15 [get_ports FMC3_LA06_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA06_N]
set_property PACKAGE_PIN AK12 [get_ports FMC3_LA07_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA07_P]
set_property PACKAGE_PIN AL12 [get_ports FMC3_LA07_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA07_N]
set_property PACKAGE_PIN AM13 [get_ports FMC3_LA08_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA08_P]
set_property PACKAGE_PIN AN13 [get_ports FMC3_LA08_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA08_N]
set_property PACKAGE_PIN AM12 [get_ports FMC3_LA09_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA09_P]
set_property PACKAGE_PIN AM11 [get_ports FMC3_LA09_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA09_N]
set_property PACKAGE_PIN AN15 [get_ports FMC3_LA10_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA10_P]
set_property PACKAGE_PIN AN14 [get_ports FMC3_LA10_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA10_N]
set_property PACKAGE_PIN AN11 [get_ports FMC3_LA11_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA11_P]
set_property PACKAGE_PIN AP11 [get_ports FMC3_LA11_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA11_N]
set_property PACKAGE_PIN AP12 [get_ports FMC3_LA12_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA12_P]
set_property PACKAGE_PIN AR12 [get_ports FMC3_LA12_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA12_N]
set_property PACKAGE_PIN AR15 [get_ports FMC3_LA13_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA13_P]
set_property PACKAGE_PIN AT15 [get_ports FMC3_LA13_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA13_N]
set_property PACKAGE_PIN AT12 [get_ports FMC3_LA14_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA14_P]
set_property PACKAGE_PIN AU12 [get_ports FMC3_LA14_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA14_N]
set_property PACKAGE_PIN AV15 [get_ports FMC3_LA15_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA15_P]
set_property PACKAGE_PIN AV14 [get_ports FMC3_LA15_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA15_N]
set_property PACKAGE_PIN AW15 [get_ports FMC3_LA16_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA16_P]
set_property PACKAGE_PIN AY15 [get_ports FMC3_LA16_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA16_N]
set_property PACKAGE_PIN AT17 [get_ports FMC3_LA17_CC_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA17_CC_P]
set_property PACKAGE_PIN AU17 [get_ports FMC3_LA17_CC_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA17_CC_N]
set_property PACKAGE_PIN AU18 [get_ports FMC3_LA18_CC_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA18_CC_P]
set_property PACKAGE_PIN AV18 [get_ports FMC3_LA18_CC_N]
www.xilinx.com VC7203 GTX Transceiver Characterization Board
UG957 (v1.3) October 17, 2014