Pld Watchdog Timer Count Register; Pld Watchdog Timer Count Value Register - SMART Embedded Computing MVME2502 Installation And Use Manual

Memory Maps and Registers
5.5.20

PLD Watchdog Timer Count Register

The MVME2502 provides a watchdog timer count register.
Table 5-23
REG
Bit
Field
OPER
RESET
Field Description
Count
5.5.21

PLD Watchdog Timer Count Value Register

The MVME2502 provides a watchdog timer count value register.
Table 5-24
REG
Bit
Field
OPER
RESET
Field Description
Count Value
110
PLD Watchdog Timer Count Register
PLD Watchdog Timer Count - 0xffc80606
15:0
Count
R/W
0xEA60 (60secs)
Count. These bits define the watchdog timer count value. When the
watchdog counter is enabled, it will count up from zero (reset value) with a 1
ms resolution until it reaches the COUNT value set by this register.
Watchdog will generate a soft reset signal if it bites.
Setting this register to 0xEA60 or 60,000 counts will provide a watchdog
timeout of 60 seconds.
PLD Watchdog Timer Count Register
PLD Watchdog Timer Count Value- 0xffc80608
15:0
Count Value
R
0x0000
These bits indicate the current value of the watch dog counter.
MVME2502 Installation and Use (6806800R96G)
Memory Maps and Registers