Pld Watchdog Timer Refresh Register; Pld Watchdog Control Register - SMART Embedded Computing MVME2502 Installation And Use Manual

5.5.18

PLD Watchdog Timer Refresh Register

The MVME2502 provides a watchdog timer refresh register.
Table 5-21
REG PLD Watch Dog Timer Load - 0xFFC80600
Bit 15
Field
RSVD
OPER R
RESET 0000
Field Description
Refresh
5.5.19

PLD Watchdog Control Register

The MVME2502 provides a watchdog control register.
Table 5-22
REG PLD Watch Dog Timer Load - 0xFFC80604
Bit 15
Watchdog
Field
_EN
OPER R/W
RESET 0000
Field Description
EN Enable. If cleared, the watchdog timer is disabled. If set, the watchdog timer is
enabled.
MVME2502 Installation and Use (6806800R96G)
PLD Watchdog Timer Refresh Register
14 13 12
RSVD RSVD RSVD
Counter Refresh. When the pattern 0x00DB is written, the watchdog counter
will be reset to zero.
PLD Watchdog Control Register
14 13 12 11
RSV RSV RSV RSV
D D D D
R
Memory Maps and Registers
11 10 9
RSVD RSVD RSVD
10 9 8 7 6
RSV RSV RSV RSV RSV
D D D D D
8 7 6 5 4 3 2 1 0
Refresh
RSVD
5 4 3 2 1
RSV RSV RSV RSV RSV
D D D D D
0
RSV
D
109