Pld Write Protect And I C Debug Register - SMART Embedded Computing MVME2502 Installation And Use Manual

Memory Maps and Registers
Field Description
BOOT_BLOCK_A
BOOT_SPI
5.5.12 PLD Write Protect and I
The MVME2502 PLD provides an 8-bit register which is used to indicate the status of I
and SPI write-protect manual switches and is used to control the SPI write-enable. The I
debug ports are also provided in this register which is used in controlling the bus' status.
Table 5-15
REG
Bit
Field
OPER
RESET
Field Description
SPD_WP-
MASTER_WP-
USER_WP-
I2C_DEBUG_EN
104
Boot Block Manual Selector Switch
1 - SPI0
0 - SPI1
Actual Boot Bank
1 - SP1
0 - SPI0
PLD Write Protect and I
PLD Write Protect I2C Debug- 0xFFDF0054
7 6 5
MASTER
FLASH_
RSVD _WP_DI
WP_N
SABLED
R R R
0 1 0
SPD write-protection
0 - SPD Writes enabled
1 - SPD Writes disabled
MASTER WP Switch (S2-6)
0-Switch S2-6 closed. SPI, SPD, VPD, USER FLASH write
enable
1-Switch S2-6 open, register bits control write protectioN
USER FLASH write-protect
1 - USER I2C FLASH writes disabled
0 - USER I2C FLASH writes enabled
I2C debug ports (I2C_1_D and I2C_1_C) enable
1 - Drive Enabled
0 - Drive Disabled
2
C Debug Register
2
C Debug Register
4 3
SERIAL_
I2C_DEB
FLASH_
UG_EN
WP
R/W R/W
0 1
MVME2502 Installation and Use (6806800R96G)
Memory Maps and Registers
2 1 0
RSVD I2C_1_D I2C_1_C
R R/W R/W
0 1 1
2
C
2
C