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Keysight E1459A Register Definitions
For Positive/Negative Edge Detect and Mask Registers, channels 48 through 63
are accessed when BS = 1 in the Status/Control Register.
Negative Edge Detect Register Port 1/3
The Negative Edge Detect Register for Port 1/3 (base + 26
of the Control/Status Register is low ("0"), Port 1 data is accessed. If bit 4 is high
("1"), Port 3 data will be accessed. The operation of the Negative Edge Detect
Register for Port 1/3 is identical to those of Port 0/2.
Negative Edge Detect Register Port 1/3 (Channels 16-31/48-63) (base + 26h)
b + 26
15
14
13
h
Write
No Effect
Read
Ch3
Ch3
Ch2
1
0
9
Read
Ch6
Ch6
Ch6
3
2
1
Positive Mask Register Port 1/3
The Positive Mask Register for Port 1/3 (base + 28
4 of the Control/Status Register is low ("0"), Port 1 data is accessed. If bit 4 is
high ("1"), Port 3 data will be accessed. The operation of the Positive Mask
Register for Port 1/3 is identical to those of Port 0/2.
Positive Mask Register Port 1/3 (Channels 16-31/48-63) (base + 28h)
b + 28
15
14
h
Read/Wr
ite
Ch3
Ch3
1
0
Read/Wr
ite
Ch6
Ch6
3
2
100
12
11
10
Ch2
Ch2
Ch2
8
7
6
Ch6
Ch5
Ch5
0
9
8
13
12
11
10
Ch2
Ch2
Ch2
Ch2
9
8
7
6
Ch6
Ch6
Ch5
Ch5
1
0
9
8
9
8
7
6
Ch2
Ch2
Ch2
Ch2
5
4
3
2
Ch5
Ch5
Ch5
Ch5
7
6
5
4
9
8
7
6
Ch2
Ch2
Ch2
Ch2
5
4
3
2
Ch5
Ch5
Ch5
Ch5
7
6
5
4
Keysight E1459A/Z2404B User and SCPI Programming Guide
Register Definitions
) is read only. If bit 4
h
5
4
3
2
Ch2
Ch2
Ch1
Ch1
1
0
9
8
Ch5
Ch5
Ch5
Ch5
3
2
1
0
) can be read or written. If bit
h
5
4
3
2
Ch2
Ch2
Ch1
Ch1
1
0
9
8
Ch5
Ch5
Ch5
Ch5
3
2
1
0
1
0
Ch1
Ch1
7
6
Ch4
Ch4
9
8
1
0
Ch1
Ch1
7
6
Ch4
Ch4
9
8
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