3.3 L90 CHANNEL COMMUNICATION
b) RS422: TRANSMIT TIMING
The RS422 Interface accepts one clock input for Transmit Timing. It is important that the rising edge of the 64 kHz Transmit
Timing clock of the Multiplexer Interface is sampling the data in the center of the Transmit Data window. Therefore, it is
important to confirm Clock and Data Transitions to ensure Proper System Operation. For example, the following figure
shows the positive edge of the Tx Clock in the center of the Tx Data bit.
Tx Da ta
Figure 3–32: CLOCK AND DATA TRANSITIONS
c) RS422: RECEIVE TIMING
The RS422 Interface utilizes NRZI-MARK Modulation Code and; therefore, does not rely on an Rx Clock to recapture data.
NRZI-MARK is an edge-type, invertible, self-clocking code.
To recover the Rx Clock from the data-stream, an integrated DPLL (Digital Phase Lock Loop) circuit is utilized. The DPLL is
driven by an internal clock, which is over-sampled 16X, and uses this clock along with the data-stream to generate a data
clock that can be used as the SCC (Serial Communication Controller) receive clock.
GE Power Management
L90 Line Differential Relay