Frequency Tracking And Phase Locking - GE UR Series Instruction Manual

8.1 OVERVIEW
Each relay has a digital clock that determines when to take data samples and which is phase synchronized to all other
clocks in the system and frequency synchronized to the power system frequency. Phase synchronization drives the relative
timing error between clocks to zero, and is needed to control the uncertainty in the phase angle of phasor measurements,
which will be held to under 26 microseconds (0.6 degrees). Frequency synchronization to the power system eliminates a
source of error in phasor measurements that arises when data samples do not exactly span one cycle.
The block diagram for clock control for a two terminal system is shown in Figure 8–4. Each relay makes a local estimate of
the difference between the power system frequency and the clock frequency based on the rotation of phasors. Each relay
also makes a local estimate of the time difference between its clock and the other clocks either by exchanging timing infor-
mation over communications channels or from information that is in the current phasors, depending on whichever one is
more accurate at any given time. A loop filter then uses the frequency and phase angle deviation information to make fine
adjustments to the clock frequency.
omega – omega1
+
+
+
(phi2 – phi1)/2
(phi2 – phi1)/2
Figure 8–4: BLOCK DIAGRAM FOR CLOCK SYNCHRONIZATION IN A 2-TERMINAL SYSTEM
8
Estimation of frequency deviation is done locally at each relay based on rotation of positive sequence current, or on rotation
of positive sequence voltage, if it is available. The counter clockwise rotation rate is proportional to the difference between
the desired clock frequency and the actual clock frequency. With the peer to peer architecture, there is redundant frequency
tracking, so it is not necessary that all terminals perform frequency detection.
Normally each relay will detect frequency deviation, but if there is no current flowing nor voltage measurement available at
a particular relay, it will not be able to detect frequency deviation. In that case, the frequency deviation input to the loop filter
is set to zero and frequency tracking is still achieved because of phase locking to the other clocks. If frequency detection is
lost at all terminals because there is no current flowing then the clocks continue to operate at the frequency present at the
time of the loss of frequency detection. Tracking will resume as soon as there is current.
8-6
omega
+
_
Compute
Frequency
omega1
Deviation
Phase Frequency
Loop Filter
phi1
Ping-Pong
Phase
Deviation
Current
Phase
Deviation
L90 Line Differential Relay

8.1.9 FREQUENCY TRACKING AND PHASE LOCKING

omega
System
Frequency
_
Compute
Frequency
Deviation
omega2
Phase Frequency
Loop Filter
phi2
Ping-Pong
time stamps
Phase
Deviation
Current
current phasors
Phase
Deviation
8 THEORY OF OPERATION
+
omega – omega2
+
+
+
(phi1 – phi2)/2
(phi1 – phi2)/2
8.1.10 FREQUENCY DETECTION
GE Power Management